From 2ef98fb9eb4a4174cabacdc4c578e040cd37b1a9 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 6 Oct 2015 13:42:33 +0000 Subject: [PATCH] rl78.c (rl78_rtx_costs): Improve cost estimates for multiplication. * config/rl78/rl78.c (rl78_rtx_costs): Improve cost estimates for multiplication. From-SVN: r228521 --- gcc/ChangeLog | 15 ++++++++++----- gcc/config/rl78/rl78.c | 26 +++++++++++++++++++++++++- 2 files changed, 35 insertions(+), 6 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6b08c7d196a..8ec89e37b01 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,12 +1,17 @@ +2015-10-06 Nick Clifton + + * config/rl78/rl78.c (rl78_rtx_costs): Improve cost estimates for + multiplication. + 2015-10-06 Venkataramanan Kumar * config.gcc (i[34567]86-*-linux* | ...): Add znver1. (case ${target}): Add znver1. * config/i386/cpuid.h(bit_CLZERO): Define. * config/i386/driver-i386.c: (host_detect_local_cpu): Let - -march=native recognize znver1 processors. + -march=native recognize znver1 processors. * config/i386/i386-c.c (ix86_target_macros_internal): Add - znver1, clzero def_and_undef. + znver1, clzero def_and_undef. * config/i386/i386.c (struct processor_costs znver1_cost): New. (m_znver1): New definition. (m_AMD_MULTIPLE): Includes m_znver1. @@ -17,10 +22,10 @@ (PTA_CLZERO) : New definition. (ix86_option_override_internal): Handle new clzerooption. (ix86_issue_rate): Add znver1. - (ix86_adjust_cost): Add znver1. + (ix86_adjust_cost): Add znver1. (ia32_multipass_dfa_lookahead): Add znver1. - (has_dispatch): Add znver1. - * config/i386/i386.h (TARGET_znver1): New definition. + (has_dispatch): Add znver1. + * config/i386/i386.h (TARGET_znver1): New definition. (TARGET_CLZERO): Define. (TARGET_CLZERO_P): Define. (struct ix86_size_cost): Add TARGET_ZNVER1. diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c index e74d6c38a31..43676829535 100644 --- a/gcc/config/rl78/rl78.c +++ b/gcc/config/rl78/rl78.c @@ -4165,21 +4165,42 @@ rl78_rtx_costs (rtx x, return true; } + if (mode == HImode) + { + if (code == MULT && ! speed) + { + * total = COSTS_N_INSNS (8); + return true; + } + return false; + } + if (mode == SImode) { switch (code) { case MULT: - if (RL78_MUL_G14) + if (! speed) + /* If we are compiling for space then we do not want to use the + inline SImode multiplication patterns or shift sequences. + The cost is not set to 1 or 5 however as we have to allow for + the possibility that we might be converting a leaf function + into a non-leaf function. (There is no way to tell here). + A value of 13 seems to be a reasonable compromise for the + moment. */ + * total = COSTS_N_INSNS (13); + else if (RL78_MUL_G14) *total = COSTS_N_INSNS (14); else if (RL78_MUL_G13) *total = COSTS_N_INSNS (29); else *total = COSTS_N_INSNS (500); return true; + case PLUS: *total = COSTS_N_INSNS (8); return true; + case ASHIFT: case ASHIFTRT: case LSHIFTRT: @@ -4205,6 +4226,9 @@ rl78_rtx_costs (rtx x, else *total = COSTS_N_INSNS (10+4*16); return true; + + default: + break; } } return false; -- 2.30.2