From 2f25380c739d22cf72c137a5bdbaf6159e7ac6e7 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 23 Jun 2021 10:48:19 +0100 Subject: [PATCH] --- openpower/sv/overview.mdwn | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn index ffee381ec..e00d3678e 100644 --- a/openpower/sv/overview.mdwn +++ b/openpower/sv/overview.mdwn @@ -64,8 +64,9 @@ Unlike in SIMD, powers of two limitations are not involved in the ISA or in the assembly code. SimpleV takes the Cray style Vector principle and applies it in the -abstract to a Scalar ISA, in the process allowing register file size -increases using "tagging" (similar to how x86 originally extended +abstract to a Scalar ISA in the same way that x86 used to do its "REP" instruction. In the process, "context" is applied, allowing amongst other things +a register file size +increase using "tagging" (similar to how x86 originally extended registers from 32 to 64 bit). ## SV -- 2.30.2