From 2f4a65844606861aa2aec43db9a49997d0e02a5f Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Mon, 10 Apr 2017 17:27:38 -0700 Subject: [PATCH] Improve fp ldst/move tests; remove redundant fsgnj tests --- isa/rv32uf/Makefrag | 2 +- isa/rv32uf/fsgnj.S | 7 ---- isa/rv64ud/Makefrag | 2 +- isa/rv64ud/fsgnj.S | 44 --------------------- isa/rv64ud/ldst.S | 8 +++- isa/rv64ud/move.S | 94 ++++++++++++++++++++++++++++++++++++++++----- isa/rv64uf/Makefrag | 2 +- isa/rv64uf/fsgnj.S | 44 --------------------- isa/rv64uf/move.S | 45 +++++++++++++++------- 9 files changed, 126 insertions(+), 122 deletions(-) delete mode 100644 isa/rv32uf/fsgnj.S delete mode 100644 isa/rv64ud/fsgnj.S delete mode 100644 isa/rv64uf/fsgnj.S diff --git a/isa/rv32uf/Makefrag b/isa/rv32uf/Makefrag index bc958a7..7dde664 100644 --- a/isa/rv32uf/Makefrag +++ b/isa/rv32uf/Makefrag @@ -3,7 +3,7 @@ #----------------------------------------------------------------------- rv32uf_sc_tests = \ - fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin fsgnj \ + fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin \ ldst move recoding \ rv32uf_p_tests = $(addprefix rv32uf-p-, $(rv32uf_sc_tests)) diff --git a/isa/rv32uf/fsgnj.S b/isa/rv32uf/fsgnj.S deleted file mode 100644 index 6d05a23..0000000 --- a/isa/rv32uf/fsgnj.S +++ /dev/null @@ -1,7 +0,0 @@ -# See LICENSE for license details. - -#include "riscv_test.h" -#undef RVTEST_RV64UF -#define RVTEST_RV64UF RVTEST_RV32UF - -#include "../rv64uf/fsgnj.S" diff --git a/isa/rv64ud/Makefrag b/isa/rv64ud/Makefrag index 6e8be9c..9cffb5d 100644 --- a/isa/rv64ud/Makefrag +++ b/isa/rv64ud/Makefrag @@ -3,7 +3,7 @@ #----------------------------------------------------------------------- rv64ud_sc_tests = \ - fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin fsgnj \ + fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin \ ldst move structural recoding \ rv64ud_p_tests = $(addprefix rv64ud-p-, $(rv64ud_sc_tests)) diff --git a/isa/rv64ud/fsgnj.S b/isa/rv64ud/fsgnj.S deleted file mode 100644 index e914777..0000000 --- a/isa/rv64ud/fsgnj.S +++ /dev/null @@ -1,44 +0,0 @@ -# See LICENSE for license details. - -#***************************************************************************** -# fsgnj.S -#----------------------------------------------------------------------------- -# -# Test fsgn{j|jn|x}.d instructions. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV64UF -RVTEST_CODE_BEGIN - - #------------------------------------------------------------- - # Arithmetic tests - #------------------------------------------------------------- - - TEST_FP_OP2_D( 2, fsgnj.d, 0, -6.3, 6.3, -1.0 ); - TEST_FP_OP2_D( 3, fsgnj.d, 0, 7.3, 7.3, 2.0 ); - TEST_FP_OP2_D( 4, fsgnj.d, 0, -8.3, -8.3, -3.0 ); - TEST_FP_OP2_D( 5, fsgnj.d, 0, 9.3, -9.3, 4.0 ); - - TEST_FP_OP2_D(12, fsgnjn.d, 0, 6.3, 6.3, -1.0 ); - TEST_FP_OP2_D(13, fsgnjn.d, 0, -7.3, 7.3, 2.0 ); - TEST_FP_OP2_D(14, fsgnjn.d, 0, 8.3, -8.3, -3.0 ); - TEST_FP_OP2_D(15, fsgnjn.d, 0, -9.3, -9.3, 4.0 ); - - TEST_FP_OP2_D(22, fsgnjx.d, 0, -6.3, 6.3, -1.0 ); - TEST_FP_OP2_D(23, fsgnjx.d, 0, 7.3, 7.3, 2.0 ); - TEST_FP_OP2_D(24, fsgnjx.d, 0, 8.3, -8.3, -3.0 ); - TEST_FP_OP2_D(25, fsgnjx.d, 0, -9.3, -9.3, 4.0 ); - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END diff --git a/isa/rv64ud/ldst.S b/isa/rv64ud/ldst.S index 59084e3..9629341 100644 --- a/isa/rv64ud/ldst.S +++ b/isa/rv64ud/ldst.S @@ -13,8 +13,12 @@ RVTEST_RV64UF RVTEST_CODE_BEGIN - TEST_CASE(2, a0, 0x40000000bf800000, la a1, tdat; fld f2, 0(a1); fsd f2, 16(a1); ld a0, 16(a1)) - TEST_CASE(3, a0, 0xc080000040400000, la a1, tdat; fld f2, 8(a1); fsd f2, 16(a1); ld a0, 16(a1)) + la s0, tdat + TEST_CASE(2, a0, 0x40000000bf800000, fld f2, 0(s0); fsd f2, 16(s0); ld a0, 16(s0)) + TEST_CASE(3, a0, 0x40000000bf800000, fld f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0)) + TEST_CASE(4, a0, 0x40000000bf800000, flw f2, 0(s0); fsw f2, 16(s0); ld a0, 16(s0)) + TEST_CASE(5, a0, 0xc080000040400000, fld f2, 8(s0); fsd f2, 16(s0); ld a0, 16(s0)) + TEST_CASE(6, a0, 0xffffffff40400000, flw f2, 8(s0); fsd f2, 16(s0); ld a0, 16(s0)) TEST_PASSFAIL diff --git a/isa/rv64ud/move.S b/isa/rv64ud/move.S index 806d4de..ccc41b5 100644 --- a/isa/rv64ud/move.S +++ b/isa/rv64ud/move.S @@ -4,8 +4,7 @@ # move.S #----------------------------------------------------------------------------- # -# This test verifies that mxtf.[s,d], mftx.[s,d], fssr, frsr, -# and fsgnj[x|n].d work properly. +# This test verifies that fmv.d.x, fmv.x.d, and fsgnj[x|n].d work properly. # #include "riscv_test.h" @@ -14,15 +13,92 @@ RVTEST_RV64UF RVTEST_CODE_BEGIN -li a0, 1 -fssr a0 +#define TEST_FSGNJD(n, insn, new_sign, rs1_sign, rs2_sign) \ + TEST_CASE(n, a0, 0x123456789abcdef0 | (-(new_sign) << 63), \ + li a1, ((rs1_sign) << 63) | 0x123456789abcdef0; \ + li a2, -(rs2_sign); \ + fmv.d.x f1, a1; \ + fmv.d.x f2, a2; \ + insn f0, f1, f2; \ + fmv.x.d a0, f0) - TEST_CASE(2, a1, 1, li a0, 0x1234; fssr a1, a0) - TEST_CASE(3, a0, 0x34, frsr a0) - TEST_CASE(4, a0, 0x34, frsr a0) + TEST_FSGNJD(10, fsgnj.d, 0, 0, 0) + TEST_FSGNJD(11, fsgnj.d, 1, 0, 1) + TEST_FSGNJD(12, fsgnj.d, 0, 1, 0) + TEST_FSGNJD(13, fsgnj.d, 1, 1, 1) - TEST_CASE(5, a0, 0x3FF02468A0000000, li a1, 0x3FF02468A0000000; fmv.d.x f1, a1; fmv.x.d a0, f1) - TEST_CASE(6, a0, 0xBFF02468A0001000, li a1, 0x3FF02468A0001000; li a2, -1; fmv.d.x f1, a1; fmv.d.x f2, a2; fsgnj.d f0, f1, f2; fmv.x.d a0, f0) + TEST_FSGNJD(20, fsgnjn.d, 1, 0, 0) + TEST_FSGNJD(21, fsgnjn.d, 0, 0, 1) + TEST_FSGNJD(22, fsgnjn.d, 1, 1, 0) + TEST_FSGNJD(23, fsgnjn.d, 0, 1, 1) + + TEST_FSGNJD(30, fsgnjx.d, 0, 0, 0) + TEST_FSGNJD(31, fsgnjx.d, 1, 0, 1) + TEST_FSGNJD(32, fsgnjx.d, 1, 1, 0) + TEST_FSGNJD(33, fsgnjx.d, 0, 1, 1) + +// Test fsgnj.s in conjunction with double-precision moves +#define TEST_FSGNJS(n, rd, rs1, rs2) \ + TEST_CASE(n, a0, (rd) | (-((rd) >> 31) << 32), \ + li a1, rs1; \ + li a2, rs2; \ + fmv.d.x f1, a1; \ + fmv.d.x f2, a2; \ + fsgnj.s f0, f1, f2; \ + fmv.x.s a0, f0); \ + TEST_CASE(1##n, a0, (rd) | 0xffffffff00000000, \ + li a1, rs1; \ + li a2, rs2; \ + fmv.d.x f1, a1; \ + fmv.d.x f2, a2; \ + fsgnj.s f0, f1, f2; \ + fmv.x.d a0, f0) + + TEST_FSGNJS(40, 0x7fc00000, 0x7ffffffe12345678, 0) + TEST_FSGNJS(41, 0x7fc00000, 0xfffffffe12345678, 0) + TEST_FSGNJS(42, 0x7fc00000, 0x7fffffff12345678, 0) + TEST_FSGNJS(43, 0x12345678, 0xffffffff12345678, 0) + + TEST_FSGNJS(50, 0x7fc00000, 0x7ffffffe12345678, 0x80000000) + TEST_FSGNJS(51, 0x7fc00000, 0xfffffffe12345678, 0x80000000) + TEST_FSGNJS(52, 0x7fc00000, 0x7fffffff12345678, 0x80000000) + TEST_FSGNJS(53, 0x12345678, 0xffffffff12345678, 0x80000000) + + TEST_FSGNJS(60, 0xffc00000, 0x7ffffffe12345678, 0xffffffff80000000) + TEST_FSGNJS(61, 0xffc00000, 0xfffffffe12345678, 0xffffffff80000000) + TEST_FSGNJS(62, 0x92345678, 0xffffffff12345678, 0xffffffff80000000) + TEST_FSGNJS(63, 0x12345678, 0xffffffff12345678, 0x7fffffff80000000) + +// Test fsgnj.d in conjunction with single-precision moves +#define TEST_FSGNJD_SP(n, isnan, rd, rs1, rs2) \ + TEST_CASE(n, a0, ((rd) & 0xffffffff) | (-(((rd) >> 31) & 1) << 32), \ + li a1, rs1; \ + li a2, rs2; \ + fmv.d.x f1, a1; \ + fmv.d.x f2, a2; \ + fsgnj.d f0, f1, f2; \ + feq.s a0, f0, f0; \ + addi a0, a0, -!(isnan); \ + bnez a0, 1f; \ + fmv.x.s a0, f0; \ + 1:); \ + TEST_CASE(1##n, a0, rd, \ + li a1, rs1; \ + li a2, rs2; \ + fmv.d.x f1, a1; \ + fmv.d.x f2, a2; \ + fsgnj.d f0, f1, f2; \ + fmv.x.d a0, f0; \ + 1:) + + TEST_FSGNJD_SP(70, 0, 0xffffffff11111111, 0xffffffff11111111, 0xffffffff11111111) + TEST_FSGNJD_SP(71, 1, 0x7fffffff11111111, 0xffffffff11111111, 0x7fffffff11111111) + TEST_FSGNJD_SP(72, 0, 0xffffffff11111111, 0xffffffff11111111, 0xffffffff91111111) + TEST_FSGNJD_SP(73, 0, 0xffffffff11111111, 0xffffffff11111111, 0x8000000000000000) + TEST_FSGNJD_SP(74, 0, 0xffffffff11111111, 0x7fffffff11111111, 0xffffffff11111111) + TEST_FSGNJD_SP(75, 1, 0x7fffffff11111111, 0x7fffffff11111111, 0x7fffffff11111111) + TEST_FSGNJD_SP(76, 0, 0xffffffff11111111, 0x7fffffff11111111, 0xffffffff91111111) + TEST_FSGNJD_SP(77, 0, 0xffffffff11111111, 0x7fffffff11111111, 0x8000000000000000) TEST_PASSFAIL diff --git a/isa/rv64uf/Makefrag b/isa/rv64uf/Makefrag index d3c3f23..33c11db 100644 --- a/isa/rv64uf/Makefrag +++ b/isa/rv64uf/Makefrag @@ -3,7 +3,7 @@ #----------------------------------------------------------------------- rv64uf_sc_tests = \ - fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin fsgnj \ + fadd fdiv fclass fcmp fcvt fcvt_w fmadd fmin \ ldst move recoding \ rv64uf_p_tests = $(addprefix rv64uf-p-, $(rv64uf_sc_tests)) diff --git a/isa/rv64uf/fsgnj.S b/isa/rv64uf/fsgnj.S deleted file mode 100644 index 6d4bdb4..0000000 --- a/isa/rv64uf/fsgnj.S +++ /dev/null @@ -1,44 +0,0 @@ -# See LICENSE for license details. - -#***************************************************************************** -# fsgnj.S -#----------------------------------------------------------------------------- -# -# Test fsgn{j|jn|x}.s instructions. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV64UF -RVTEST_CODE_BEGIN - - #------------------------------------------------------------- - # Arithmetic tests - #------------------------------------------------------------- - - TEST_FP_OP2_S( 2, fsgnj.s, 0, -6.3, 6.3, -1.0 ); - TEST_FP_OP2_S( 3, fsgnj.s, 0, 7.3, 7.3, 2.0 ); - TEST_FP_OP2_S( 4, fsgnj.s, 0, -8.3, -8.3, -3.0 ); - TEST_FP_OP2_S( 5, fsgnj.s, 0, 9.3, -9.3, 4.0 ); - - TEST_FP_OP2_S(12, fsgnjn.s, 0, 6.3, 6.3, -1.0 ); - TEST_FP_OP2_S(13, fsgnjn.s, 0, -7.3, 7.3, 2.0 ); - TEST_FP_OP2_S(14, fsgnjn.s, 0, 8.3, -8.3, -3.0 ); - TEST_FP_OP2_S(15, fsgnjn.s, 0, -9.3, -9.3, 4.0 ); - - TEST_FP_OP2_S(22, fsgnjx.s, 0, -6.3, 6.3, -1.0 ); - TEST_FP_OP2_S(23, fsgnjx.s, 0, 7.3, 7.3, 2.0 ); - TEST_FP_OP2_S(24, fsgnjx.s, 0, 8.3, -8.3, -3.0 ); - TEST_FP_OP2_S(25, fsgnjx.s, 0, -9.3, -9.3, 4.0 ); - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END diff --git a/isa/rv64uf/move.S b/isa/rv64uf/move.S index a94af55..60f7cf3 100644 --- a/isa/rv64uf/move.S +++ b/isa/rv64uf/move.S @@ -4,8 +4,8 @@ # move.S #----------------------------------------------------------------------------- # -# This test verifies that mxtf.[s,d], mftx.[s,d], fssr, frsr, -# and fsgnj[x|n].s work properly. +# This test verifies that the fmv.s.x, fmv.x.s, and fsgnj[x|n].d instructions +# and the fcsr work properly. # #include "riscv_test.h" @@ -14,18 +14,37 @@ RVTEST_RV64UF RVTEST_CODE_BEGIN -li a0, 1 -fssr a0 - - TEST_CASE(2, a1, 1, li a0, 0x1234; fssr a1, a0) + TEST_CASE(2, a1, 1, csrwi fcsr, 1; li a0, 0x1234; fssr a1, a0) TEST_CASE(3, a0, 0x34, frsr a0) - TEST_CASE(4, a0, 0x34, frsr a0) - - TEST_CASE(5, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; fmv.s.x f0, a1; fmv.x.s a0, f0) - - TEST_CASE(6, a0, 0xFFFFFFFFBF812345, li a1, 0xFFFFFFFFBF812345; fmv.s.x f0, a1; fsgnj.s f1, f0, f0; fmv.x.s a0, f1) - TEST_CASE(7, a0, 0x000000004BA98765, li a1, 0xFFFFFFFFCBA98765; fmv.s.x f0, a1; fsgnjx.s f1, f0, f0; fmv.x.s a0, f1) - TEST_CASE(8, a0, 0x000000005EADBEEF, li a1, 0xFFFFFFFFDEADBEEF; fmv.s.x f0, a1; fsgnjn.s f1, f0, f0; fmv.x.s a0, f1) + TEST_CASE(4, a0, 0x14, frflags a0) + TEST_CASE(5, a0, 0x01, csrrwi a0, frm, 2) + TEST_CASE(6, a0, 0x54, frsr a0) + TEST_CASE(7, a0, 0x14, csrrci a0, fflags, 4) + TEST_CASE(8, a0, 0x50, frsr a0) + +#define TEST_FSGNJS(n, insn, new_sign, rs1_sign, rs2_sign) \ + TEST_CASE(n, a0, 0x12345678 | (-(new_sign) << 31), \ + li a1, ((rs1_sign) << 31) | 0x12345678; \ + li a2, -(rs2_sign); \ + fmv.s.x f1, a1; \ + fmv.s.x f2, a2; \ + insn f0, f1, f2; \ + fmv.x.s a0, f0) + + TEST_FSGNJS(10, fsgnj.s, 0, 0, 0) + TEST_FSGNJS(11, fsgnj.s, 1, 0, 1) + TEST_FSGNJS(12, fsgnj.s, 0, 1, 0) + TEST_FSGNJS(13, fsgnj.s, 1, 1, 1) + + TEST_FSGNJS(20, fsgnjn.s, 1, 0, 0) + TEST_FSGNJS(21, fsgnjn.s, 0, 0, 1) + TEST_FSGNJS(22, fsgnjn.s, 1, 1, 0) + TEST_FSGNJS(23, fsgnjn.s, 0, 1, 1) + + TEST_FSGNJS(30, fsgnjx.s, 0, 0, 0) + TEST_FSGNJS(31, fsgnjx.s, 1, 0, 1) + TEST_FSGNJS(32, fsgnjx.s, 1, 1, 0) + TEST_FSGNJS(33, fsgnjx.s, 0, 1, 1) TEST_PASSFAIL -- 2.30.2