From 2f924de654ff8f719faf60b84948397809baaac6 Mon Sep 17 00:00:00 2001 From: "Jose E. Marchesi" Date: Fri, 6 Oct 2017 11:49:39 +0200 Subject: [PATCH] gdb: Fix decoding of ARM neon memory hint insns. gdb/ChangeLog: 2017-10-05 Jose E. Marchesi PR build/22188 * arm-tdep.c (arm_decode_misc_memhint_neon): Fix decoding of CPS and SETEND. --- gdb/ChangeLog | 6 ++++++ gdb/arm-tdep.c | 4 ++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 59eb04a9d6a..966472c45e7 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2017-10-05 Jose E. Marchesi + + PR build/22188 + * arm-tdep.c (arm_decode_misc_memhint_neon): Fix decoding of CPS + and SETEND. + 2017-10-05 Pedro Alves * linux-nat.c (linux_child_follow_fork): When following the parent diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 27093217b8d..d8569e051ac 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -6406,9 +6406,9 @@ arm_decode_misc_memhint_neon (struct gdbarch *gdbarch, uint32_t insn, unsigned int op1 = bits (insn, 20, 26), op2 = bits (insn, 4, 7); unsigned int rn = bits (insn, 16, 19); - if (op1 == 0x10 && (op2 & 0x2) == 0x0 && (rn & 0xe) == 0x0) + if (op1 == 0x10 && (op2 & 0x2) == 0x0 && (rn & 0x1) == 0x0) return arm_copy_unmodified (gdbarch, insn, "cps", dsc); - else if (op1 == 0x10 && op2 == 0x0 && (rn & 0xe) == 0x1) + else if (op1 == 0x10 && op2 == 0x0 && (rn & 0x1) == 0x1) return arm_copy_unmodified (gdbarch, insn, "setend", dsc); else if ((op1 & 0x60) == 0x20) return arm_copy_unmodified (gdbarch, insn, "neon dataproc", dsc); -- 2.30.2