From 2ffa8af9db4a4a9cf4cb5bb524bd8a57c53daca0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 29 Jan 2012 03:17:18 +0100 Subject: [PATCH] r600g: set full register mask for CB_COLOR_CONTROL on evergreen We don't set the other bits anywhere else. Reviewed-by: Dave Airlie Reviewed-by: Alex Deucher --- src/gallium/drivers/r600/evergreen_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 57942fb0bc9..7fd3a368bf7 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -750,7 +750,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx, blend->cb_target_mask = target_mask; r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL, - color_control, 0xFFFFFFFD, NULL, 0); + color_control, 0xFFFFFFFF, NULL, 0); if (rctx->chip_class != CAYMAN) r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 0xFFFFFFFF, 0xFFFFFFFF, NULL, 0); -- 2.30.2