From 3029ab1e450043a3fa6e50a2f31dd0be69abc258 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 21 Oct 2018 07:25:26 +0100 Subject: [PATCH] addd into register todo --- simple_v_extension/specification.mdwn | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn index 0fe36b88b..88f7d4f1a 100644 --- a/simple_v_extension/specification.mdwn +++ b/simple_v_extension/specification.mdwn @@ -1555,3 +1555,17 @@ for element-grouping, if there is unused space within a register they are set to all ones on write and are ignored on read, matching the existing standard for storing smaller FP values in larger registers. +--- + +info register, + +> One solution is to just not support LR/SC wider than a fixed +> implementation-dependent size, which must be at least  +>1 XLEN word, which can be read from a read-only CSR +> that can also be used for info like the kind and width of  +> hw parallelism supported (128-bit SIMD, minimal virtual  +> parallelism, etc.) and other things (like maybe the number  +> of registers supported).  + +> That CSR would have to have a flag to make a read trap so +> a hypervisor can simulate different values. -- 2.30.2