From 3045c5f274206fb4de7549388c0b7a528601a7eb Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 26 Mar 2018 17:11:51 -0400 Subject: [PATCH] radeonsi: use maximum OFFCHIP_BUFFERING on Vega12 Reviewed-by: Samuel Pitoiset --- src/gallium/drivers/radeonsi/si_pipe.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index fa9ee43389a..1cc08c5feed 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -755,7 +755,14 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, /* This must be one less than the maximum number due to a hw limitation. * Various hardware bugs in SI, CIK, and GFX9 need this. */ - unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63; + unsigned max_offchip_buffers_per_se; + + /* Only certain chips can use the maximum value. */ + if (sscreen->info.family == CHIP_VEGA12) + max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64; + else + max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63; + unsigned max_offchip_buffers = max_offchip_buffers_per_se * sscreen->info.max_se; unsigned offchip_granularity; -- 2.30.2