From 30570e9ec2d32a4a67e61008406c0ad151ef9555 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 3 Jun 2021 22:50:43 +0100 Subject: [PATCH] "standard" means IEEE754 so adding that --- openpower/sv/int_fp_mv.mdwn | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index c497f6f74..566621f8d 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -12,7 +12,7 @@ Libre-SOC will be compliant with the **Scalar Floating-Point Subset** (SFFS) i.e. is not implementing VMX/VSX, and with its focus on modern 3D GPU hybrid workloads represents an important new potential use-case for OpenPOWER. -With VMX/VSX not available in the SFFS Compliancy Level, the +With VMX/VSX not available in the SFFS Compliancy Level, the existing non-VSX conversion/data-movement instructions require load/store instructions (slow and expensive) to transfer data between the FPRs and the GPRs. Also, because SimpleV needs efficient scalar instructions in @@ -34,8 +34,7 @@ If we're adding new Integer <-> FP conversion instructions, we may as well take this opportunity to modernise the instructions and make them well suited for common/important conversion sequences: -* standard Integer -> FP conversion (**TODO, which standard?** can it - be described in words? how does it differ from the other "standards"?) +* standard Integer -> FP IEEE754 conversion * standard OpenPower FP -> Integer conversion (saturation with NaN converted to minimum valid integer) * Rust FP -> Integer conversion (saturation with NaN converted to 0) @@ -54,9 +53,9 @@ the feature being proposed. ## standard Integer -> FP conversion -TODO, explain this further - -- rounding mode read from FPSCR +This conversion is outlined in the IEEE754 specification. It is used +by nearly all programming languages and CPUs. In the case of OpenPOWER, +the rounding mode is read from FPSCR # standard OpenPower FP -> Integer conversion -- 2.30.2