From 30a38382e768b3113229585923e3f620cd23b375 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 19 May 2003 07:30:12 +0000 Subject: [PATCH] mips.c (mips_class_max_nregs): Return the number of words in the mode. * config/mips/mips.c (mips_class_max_nregs): Return the number of words in the mode. From-SVN: r66950 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.c | 15 ++++++++------- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8765e3e3595..5d2013441d7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-05-19 Richard Sandiford + + * config/mips/mips.c (mips_class_max_nregs): Return the number of + words in the mode. + 2003-05-19 Richard Sandiford * config/mips/mips.c (override_options): Disable explicit diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 8474e473574..258c7b029be 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -9014,18 +9014,19 @@ mips_secondary_reload_class (class, mode, x, in_p) return NO_REGS; } -/* This function returns the maximum number of consecutive registers - needed to represent mode MODE in registers of class CLASS. */ +/* Implement CLASS_MAX_NREGS. + + Usually all registers are word-sized. The only supported exception + is -mgp64 -msingle-float, which has 64-bit words but 32-bit float + registers. A word-based calculation is correct even in that case, + since -msingle-float disallows multi-FPR values. */ int mips_class_max_nregs (class, mode) - enum reg_class class; + enum reg_class class ATTRIBUTE_UNUSED; enum machine_mode mode; { - if (class == FP_REGS) - return FP_INC; - else - return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; + return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; } bool -- 2.30.2