From 30f7dd69bdd6bb61f05492490abad8e2306ae88b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 10 Jan 2017 02:12:30 +0100 Subject: [PATCH] soc/interconnect/stream/: add busy signal to PipelinedActor --- litex/soc/interconnect/stream.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/litex/soc/interconnect/stream.py b/litex/soc/interconnect/stream.py index 63f4c1f6..eac396c2 100644 --- a/litex/soc/interconnect/stream.py +++ b/litex/soc/interconnect/stream.py @@ -390,19 +390,23 @@ class PipelinedActor(BinaryActor): def __init__(self, latency): self.latency = latency self.pipe_ce = Signal() + self.busy = Signal() BinaryActor.__init__(self, latency) def build_binary_control(self, sink, source, latency): + busy = 0 valid = sink.valid for i in range(latency): valid_n = Signal() self.sync += If(self.pipe_ce, valid_n.eq(valid)) valid = valid_n + busy = busy | valid self.comb += [ self.pipe_ce.eq(source.ready | ~valid), sink.ready.eq(self.pipe_ce), - source.valid.eq(valid) + source.valid.eq(valid), + self.busy.eq(busy) ] last = sink.valid & sink.last for i in range(latency): -- 2.30.2