From 30fb7f4dad82653f8b8f1e7342b968da210487de Mon Sep 17 00:00:00 2001 From: Jean THOMAS Date: Tue, 28 Jul 2020 15:50:38 +0200 Subject: [PATCH] Add _DelayLine test --- gram/test/test_core_crossbar.py | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 gram/test/test_core_crossbar.py diff --git a/gram/test/test_core_crossbar.py b/gram/test/test_core_crossbar.py new file mode 100644 index 0000000..a2da8aa --- /dev/null +++ b/gram/test/test_core_crossbar.py @@ -0,0 +1,28 @@ +from nmigen import * +from nmigen.hdl.ast import Sample +from nmigen.asserts import Assert, Assume + +from gram.core.crossbar import _DelayLine +from utils import * + +class DelayLineSpec(Elaboratable): + def __init__(self, delay): + self.delay = delay + + def elaborate(self, platform): + m = Module() + + m.submodules.dut = dut = _DelayLine(self.delay) + m.d.comb += Assume(~ResetSignal("sync")) + m.d.comb += Assert(dut.o == Sample(expr=dut.i, clocks=self.delay, domain="sync")) + + return m + +class DelayLineTestCase(FHDLTestCase): + def test_delay_one(self): + spec = DelayLineSpec(1) + self.assertFormal(spec, depth=2) + + def test_delay_many(self): + spec = DelayLineSpec(10) + self.assertFormal(spec, depth=11) -- 2.30.2