From 313340aed5e7d21a52d67c0a3c2bbc1623e87315 Mon Sep 17 00:00:00 2001 From: Claire Xenia Wolf Date: Mon, 13 Dec 2021 18:20:08 +0100 Subject: [PATCH] Add YOSYS to the implicitly defined verilog macros in verific Signed-off-by: Claire Xenia Wolf --- frontends/verific/verific.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 2c2858514..d5574f95a 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -2295,7 +2295,7 @@ struct VerificPass : public Pass { log("\n"); log("Additional -D[=] options may be added after the option indicating\n"); log("the language version (and before file names) to set additional verilog defines.\n"); - log("The macros SYNTHESIS and VERIFIC are defined implicitly.\n"); + log("The macros YOSYS, SYNTHESIS, and VERIFIC are defined implicitly.\n"); log("\n"); log("\n"); log(" verific -formal ..\n"); @@ -2713,6 +2713,7 @@ struct VerificPass : public Pass { else log_abort(); + veri_file::DefineMacro("YOSYS"); veri_file::DefineMacro("VERIFIC"); veri_file::DefineMacro(args[argidx] == "-formal" ? "FORMAL" : "SYNTHESIS"); -- 2.30.2