From 317590e6c3f55b5041f74727ede657a027b2daaa Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 17 Apr 2022 18:34:51 +0100 Subject: [PATCH] --- openpower/sv/svp64/appendix.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index ffd9a30b9..97cbd5d63 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -126,6 +126,8 @@ This is the same table containing v3.0B Primary Opcodes except those that make no sense in a Vectorisation Context have been removed. These removed POs can, *in the SV Vector Context only*, be assigned to alternative (Vectorised-only) instructions, including future extensions. +EXT04 retains the scalar `madd*` operations but would have all PackedSIMD +(aka VSX) operations removed. Note, again, to emphasise: outside of svp64 these opcodes **do not** change. When not prefixed with svp64 these opcodes **specifically** @@ -133,7 +135,7 @@ retain their v3.0B / v3.1B OpenPOWER Standard compliant meaning. ``` | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 -000 | | | | | | | | mulli | 000 +000 | | | | | EXT04 | | | mulli | 000 001 | subfic | | cmpli | cmpi | addic | addic. | addi | addis | 001 010 | bc/l/a | | | EXT19 | rlwimi| rlwinm | | rlwnm | 010 011 | ori | oris | xori | xoris | andi. | andis. | EXT30 | EXT31 | 011 -- 2.30.2