From 3195eb2a577d6f292e12fd06ea6f62d234c85cd6 Mon Sep 17 00:00:00 2001
From: Cesar Strauss <cestrauss@gmail.com>
Date: Sat, 23 Jul 2022 13:59:10 -0300
Subject: [PATCH] Merge runsimsoc2.sh into runsimsoc.sh

The only difference was a different location of the ECP5 model files
and the use of python3. Make it so that both locations work, and
use python3 exclusively.
---
 gram/simulation/.gitignore    |  3 +++
 gram/simulation/runsimsoc.sh  | 15 +++++++++++++--
 gram/simulation/runsimsoc2.sh | 14 --------------
 3 files changed, 16 insertions(+), 16 deletions(-)
 delete mode 100755 gram/simulation/runsimsoc2.sh

diff --git a/gram/simulation/.gitignore b/gram/simulation/.gitignore
index 5bd86a4..2cdcaaa 100644
--- a/gram/simulation/.gitignore
+++ b/gram/simulation/.gitignore
@@ -13,3 +13,6 @@ build_simcrg/
 
 # Patched files
 DDRDLLA.v
+
+# ECP5 model files
+ecp5u
diff --git a/gram/simulation/runsimsoc.sh b/gram/simulation/runsimsoc.sh
index 1722be7..f1338e9 100755
--- a/gram/simulation/runsimsoc.sh
+++ b/gram/simulation/runsimsoc.sh
@@ -1,9 +1,20 @@
 #!/bin/bash
 set -e
 
-LIB_DIR=/usr/local/diamond/3.11_x64/ispfpga/verilog/data/ecp5u
+# Check for presence of the Diamond ECP5 verilog model files
+LIB_DIR=./ecp5u
+if [ ! -d "$LIB_DIR" ]; then
+    LIB_DIR=/usr/local/diamond/3.11_x64/ispfpga/verilog/data/ecp5u
+    if [ ! -d "$LIB_DIR" ]; then
+        echo "Error: Could not find the ECP5 verilog models." >&2
+        echo >&2
+        echo "Please either install Diamond (in /usr/local), " >&2
+        echo "or copy its ecp5u directory ($LIB_DIR) here." >&2
+        exit 1
+    fi
+fi
 
-python simsoc.py
+python3 simsoc.py
 yosys simsoc.ys
 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
 patch DDRDLLA.v < DDRDLLA.patch
diff --git a/gram/simulation/runsimsoc2.sh b/gram/simulation/runsimsoc2.sh
deleted file mode 100755
index 4f97052..0000000
--- a/gram/simulation/runsimsoc2.sh
+++ /dev/null
@@ -1,14 +0,0 @@
-#!/bin/bash
-set -e
-
-LIB_DIR=./ecp5u
-
-python3 simsoc.py
-yosys simsoc.ys
-cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
-patch DDRDLLA.v < DDRDLLA.patch
-iverilog -Wall -g2012 -s simsoctb -o simsoc simsoctb.v build_simsoc/top.v dram_model/ddr3.v ${LIB_DIR}/ECLKSYNCB.v ${LIB_DIR}/EHXPLLL.v ${LIB_DIR}/PUR.v ${LIB_DIR}/GSR.v \
-	${LIB_DIR}/FD1S3AX.v ${LIB_DIR}/SGSR.v ${LIB_DIR}/ODDRX2F.v ${LIB_DIR}/ODDRX2DQA.v ${LIB_DIR}/DELAYF.v ${LIB_DIR}/BB.v ${LIB_DIR}/OB.v ${LIB_DIR}/IB.v \
-	${LIB_DIR}/DQSBUFM.v ${LIB_DIR}/UDFDL5_UDP_X.v ${LIB_DIR}/TSHX2DQSA.v ${LIB_DIR}/TSHX2DQA.v ${LIB_DIR}/ODDRX2DQSB.v ${LIB_DIR}/IDDRX2DQA.v DDRDLLA.v \
-	${LIB_DIR}/CLKDIVF.v
-vvp -n simsoc -fst-speed
-- 
2.30.2