From 319ff62c8ab28c846365aef65c137735f8af88cb Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 4 Dec 2019 10:43:50 +0100 Subject: [PATCH] x86: consolidate tracking of MMX register use Just like for XMM/YMM/ZMM don't key this to any Cpu* flags. Instead include the two special insns (not having register operands) explicitly. --- gas/ChangeLog | 5 +++++ gas/config/tc-i386.c | 12 +++--------- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index b7d305f60c5..dba3faac802 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2019-12-04 Jan Beulich + + * config/tc-i386.c (output_insn): Don't consider Cpu* settings + when setting GNU_PROPERTY_X86_FEATURE_2_MMX. + 2019-12-04 Jan Beulich * testsuite/gas/i386/movdir.s: Add Intel syntax case with diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index b8babed68ba..b62af342684 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -8259,15 +8259,9 @@ output_insn (void) || i.tm.cpu_flags.bitfield.cpu687 || i.tm.cpu_flags.bitfield.cpufisttp) x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_X87; - /* Don't set GNU_PROPERTY_X86_FEATURE_2_MMX for prefetchtXXX nor - Xfence instructions. */ - if (i.tm.base_opcode != 0xf18 - && i.tm.base_opcode != 0xf0d - && i.tm.base_opcode != 0xfaef8 - && (i.has_regmmx - || i.tm.cpu_flags.bitfield.cpummx - || i.tm.cpu_flags.bitfield.cpua3dnow - || i.tm.cpu_flags.bitfield.cpua3dnowa)) + if (i.has_regmmx + || i.tm.base_opcode == 0xf77 /* emms */ + || i.tm.base_opcode == 0xf0e /* femms */) x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_MMX; if (i.has_regxmm) x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_XMM; -- 2.30.2