From 31c722f993f47b97a9e66a893045d2e765722d16 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Thu, 29 Nov 2012 23:47:08 +0100 Subject: [PATCH] corelogic/roundrobin: fix request width --- migen/corelogic/roundrobin.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/corelogic/roundrobin.py b/migen/corelogic/roundrobin.py index 4b754655..298c7d16 100644 --- a/migen/corelogic/roundrobin.py +++ b/migen/corelogic/roundrobin.py @@ -5,7 +5,7 @@ from migen.fhdl.structure import * class RoundRobin: def __init__(self, n, switch_policy=SP_WITHDRAW): self.n = n - self.request = Signal(max=self.n) + self.request = Signal(nbits=self.n) self.grant = Signal(max=self.n) self.switch_policy = switch_policy if self.switch_policy == SP_CE: -- 2.30.2