From 3203275e80b4dccf3620faa0f73e2d0dcd1b64d7 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Wed, 22 Mar 2023 14:56:51 -0700 Subject: [PATCH] copy table changes from ls006 to int_fp_mv --- openpower/sv/int_fp_mv.mdwn | 56 +++++++++++++------------------------ 1 file changed, 20 insertions(+), 36 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 523929c36..2009bfdaa 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -433,24 +433,16 @@ Special Registers altered: ### Assembly Aliases -| Assembly Alias | Full Instruction | -|----------------------|------------------------| -| `fcvtfgw FRT, RB` | `fcvtfg FRT, RB, 0, 0` | -| `fcvtfgw. FRT, RB` | `fcvtfg FRT, RB, 0, 1` | -| `fcvtfgws FRT, RB` | `fcvtfg FRT, RB, 0, 2` | -| `fcvtfgws. FRT, RB` | `fcvtfg FRT, RB, 0, 3` | -| `fcvtfguw FRT, RB` | `fcvtfg FRT, RB, 1, 0` | -| `fcvtfguw. FRT, RB` | `fcvtfg FRT, RB, 1, 1` | -| `fcvtfguws FRT, RB` | `fcvtfg FRT, RB, 1, 2` | -| `fcvtfguws. FRT, RB` | `fcvtfg FRT, RB, 1, 3` | -| `fcvtfgd FRT, RB` | `fcvtfg FRT, RB, 2, 0` | -| `fcvtfgd. FRT, RB` | `fcvtfg FRT, RB, 2, 1` | -| `fcvtfgds FRT, RB` | `fcvtfg FRT, RB, 2, 2` | -| `fcvtfgds. FRT, RB` | `fcvtfg FRT, RB, 2, 3` | -| `fcvtfgud FRT, RB` | `fcvtfg FRT, RB, 3, 0` | -| `fcvtfgud. FRT, RB` | `fcvtfg FRT, RB, 3, 1` | -| `fcvtfguds FRT, RB` | `fcvtfg FRT, RB, 3, 2` | -| `fcvtfguds. FRT, RB` | `fcvtfg FRT, RB, 3, 3` | +| Assembly Alias | Full Instruction | | Assembly Alias | Full Instruction | +|----------------------|------------------------|------|----------------------|------------------------| +| `fcvtfgw FRT, RB` | `fcvtfg FRT, RB, 0, 0` | | `fcvtfgd FRT, RB` | `fcvtfg FRT, RB, 2, 0` | +| `fcvtfgw. FRT, RB` | `fcvtfg FRT, RB, 0, 1` | | `fcvtfgd. FRT, RB` | `fcvtfg FRT, RB, 2, 1` | +| `fcvtfgws FRT, RB` | `fcvtfg FRT, RB, 0, 2` | | `fcvtfgds FRT, RB` | `fcvtfg FRT, RB, 2, 2` | +| `fcvtfgws. FRT, RB` | `fcvtfg FRT, RB, 0, 3` | | `fcvtfgds. FRT, RB` | `fcvtfg FRT, RB, 2, 3` | +| `fcvtfguw FRT, RB` | `fcvtfg FRT, RB, 1, 0` | | `fcvtfgud FRT, RB` | `fcvtfg FRT, RB, 3, 0` | +| `fcvtfguw. FRT, RB` | `fcvtfg FRT, RB, 1, 1` | | `fcvtfgud. FRT, RB` | `fcvtfg FRT, RB, 3, 1` | +| `fcvtfguws FRT, RB` | `fcvtfg FRT, RB, 1, 2` | | `fcvtfguds FRT, RB` | `fcvtfg FRT, RB, 3, 2` | +| `fcvtfguws. FRT, RB` | `fcvtfg FRT, RB, 1, 3` | | `fcvtfguds. FRT, RB` | `fcvtfg FRT, RB, 3, 3` | ## Floating-point to Integer Conversion Overview @@ -722,21 +714,13 @@ Special Registers altered: For brevity, `[o]` is used to mean `o` is optional there. -| Assembly Alias | Full Instruction | -|------------------------------|--------------------------------| -| `fcvttgw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 0` | -| `fcvttgw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 1` | -| `fcvtstgw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 2` | -| `fcvtstgw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 3` | -| `fcvttguw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 0` | -| `fcvttguw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 1` | -| `fcvtstguw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 2` | -| `fcvtstguw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 3` | -| `fcvttgd[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 0` | -| `fcvttgd[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 1` | -| `fcvtstgd[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 2` | -| `fcvtstgd[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 3` | -| `fcvttgud[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 0` | -| `fcvttgud[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 1` | -| `fcvtstgud[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 2` | -| `fcvtstgud[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 3` | +| Assembly Alias | Full Instruction | Assembly Alias | Full Instruction | +|------------------------------|--------------------------------|------------------------------|--------------------------------| +| `fcvttgw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 0` | `fcvttgd[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 0` | +| `fcvttgw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 1` | `fcvttgd[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 1` | +| `fcvtstgw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 2` | `fcvtstgd[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 2` | +| `fcvtstgw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 0, 3` | `fcvtstgd[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 2, 3` | +| `fcvttguw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 0` | `fcvttgud[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 0` | +| `fcvttguw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 1` | `fcvttgud[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 1` | +| `fcvtstguw[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 2` | `fcvtstgud[o] RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 2` | +| `fcvtstguw[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 1, 3` | `fcvtstgud[o]. RT, FRB, CVM` | `fcvttg[o] RT, FRB, CVM, 3, 3` | -- 2.30.2