From 323e0c6c8b280cb9d7b993611892ff2ba1aef52d Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 15 May 2020 20:15:06 +0100 Subject: [PATCH] missed some variables in the cleanup --- libreriscv | 2 +- src/soc/branch/main_stage.py | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/libreriscv b/libreriscv index 2d8ae9db..f7602e59 160000 --- a/libreriscv +++ b/libreriscv @@ -1 +1 @@ -Subproject commit 2d8ae9db6019c3a7ed881f14612f2b66bb263a9e +Subproject commit f7602e599e6557e45249b80d888631a9cf241cb7 diff --git a/src/soc/branch/main_stage.py b/src/soc/branch/main_stage.py index de1fdcb1..9a327906 100644 --- a/src/soc/branch/main_stage.py +++ b/src/soc/branch/main_stage.py @@ -83,11 +83,10 @@ class BranchMainStage(PipeModBase): comb += bd.eq(b_fields['BD'][0:-1]) bd_sgn = bd[-1] - comb += branch_imm_addr.eq( + comb += br_imm_addr.eq( Cat(Const(0, 2), bd, Repl(bd_sgn, 64-(bd.width + 2)))) - comb += branch_taken.eq(bc_taken) - + comb += br_taken.eq(bc_taken) comb += self.o.nia_out.data.eq(br_addr) comb += self.o.nia_out.ok.eq(br_taken) -- 2.30.2