From 3256a76e621b4fd466ea9da5ce8de9a24a66aa0c Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Sat, 13 Aug 2005 18:47:08 +0000 Subject: [PATCH] rs6000.h (EXTRA_CONSTRAINT): Add 'a' for indexed or indirect address operand. * config/rs6000/rs6000.h (EXTRA_CONSTRAINT): Add 'a' for indexed or indirect address operand. (EXTRA_ADDRESS_CONSTRAINT): New. * config/rs6000/rs6000.md (prefetch): Change constraint "p" to "a". From-SVN: r103056 --- gcc/ChangeLog | 7 +++++++ gcc/config/rs6000/rs6000.h | 8 ++++++++ gcc/config/rs6000/rs6000.md | 2 +- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 456967757d4..1058d983437 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-08-13 David Edelsohn + + * config/rs6000/rs6000.h (EXTRA_CONSTRAINT): Add 'a' for indexed + or indirect address operand. + (EXTRA_ADDRESS_CONSTRAINT): New. + * config/rs6000/rs6000.md (prefetch): Change constraint "p" to "a". + 2005-08-13 Sebastian Pop PR tree-optimization/22236 diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 17c98c0699a..bab54a90309 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1111,6 +1111,7 @@ enum reg_class 'W' is a vector constant that can be easily generated (no mem refs). 'Y' is an indexed or word-aligned displacement memory operand. 'Z' is an indexed or indirect memory operand. + 'a' is an indexed or indirect address operand. 't' is for AND masks that can be performed by two rldic{l,r} insns. */ #define EXTRA_CONSTRAINT(OP, C) \ @@ -1127,6 +1128,7 @@ enum reg_class : (C) == 'W' ? (easy_vector_constant (OP, GET_MODE (OP))) \ : (C) == 'Y' ? (word_offset_memref_operand (OP, GET_MODE (OP))) \ : (C) == 'Z' ? (indexed_or_indirect_operand (OP, GET_MODE (OP))) \ + : (C) == 'a' ? (indexed_or_indirect_address (OP, GET_MODE (OP))) \ : 0) /* Define which constraints are memory constraints. Tell reload @@ -1136,6 +1138,12 @@ enum reg_class #define EXTRA_MEMORY_CONSTRAINT(C, STR) \ ((C) == 'Q' || (C) == 'Y' || (C) == 'Z') +/* Define which constraints should be treated like address constraints + by the reload pass. */ + +#define EXTRA_ADDRESS_CONSTRAINT(C, STR) \ + ((C) == 'a') + /* Given an rtx X being reloaded into a reg required to be in class CLASS, return the class of reg to actually use. In general this is just CLASS; but on some machines diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 288b40f93b0..c873c8f6513 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -14016,7 +14016,7 @@ }") (define_insn "prefetch" - [(prefetch (match_operand 0 "indexed_or_indirect_address" "p") + [(prefetch (match_operand 0 "indexed_or_indirect_address" "a") (match_operand:SI 1 "const_int_operand" "n") (match_operand:SI 2 "const_int_operand" "n"))] "TARGET_POWERPC" -- 2.30.2