From 329289313c67f0ce8db19746e5c6d2601e853b3b Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Wed, 6 Jan 2016 19:19:47 +0000 Subject: [PATCH] vsx.md (*p9_vecload_): Replace VSX_M mode iterator with VSX_M2. [gcc] 2015-01-06 Bill Schmidt * config/rs6000/vsx.md (*p9_vecload_): Replace VSX_M mode iterator with VSX_M2. (*p9_vecstore_): Likewise. (*vsx_le_permute_): Restrict to !TARGET_P9_VECTOR. (*vsx_le_perm_load_ for VSX_LE_128): Likewise. (*vsx_le_perm_store_ for VSX_LE_128): Likewise. (define_split for VSX_LE128 stores): Likewise. (define_peephole2 for TImode LE swaps): Likewise. (define_split for VSX_LE128 post-reload stores): Likewise. [gcc/testsuite] 2015-01-06 Bill Schmidt * gcc.target/powerpc/p9-lxvx-stxvx-3.c: New test. From-SVN: r232109 --- gcc/ChangeLog | 12 ++++++++ gcc/config/rs6000/vsx.md | 22 +++++++------- gcc/testsuite/ChangeLog | 4 +++ .../gcc.target/powerpc/p9-lxvx-stxvx-3.c | 30 +++++++++++++++++++ 4 files changed, 57 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e5b31af4893..eaae4ec69e1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2015-01-06 Bill Schmidt + + * config/rs6000/vsx.md (*p9_vecload_): Replace VSX_M + mode iterator with VSX_M2. + (*p9_vecstore_): Likewise. + (*vsx_le_permute_): Restrict to !TARGET_P9_VECTOR. + (*vsx_le_perm_load_ for VSX_LE_128): Likewise. + (*vsx_le_perm_store_ for VSX_LE_128): Likewise. + (define_split for VSX_LE128 stores): Likewise. + (define_peephole2 for TImode LE swaps): Likewise. + (define_split for VSX_LE128 post-reload stores): Likewise. + 2016-01-06 Marek Polacek PR sanitizer/69099 diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 4606bff208f..997ff31aef3 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -304,16 +304,16 @@ ;; VSX (P9) moves (define_insn "*p9_vecload_" - [(set (match_operand:VSX_M 0 "vsx_register_operand" "=") - (match_operand:VSX_M 1 "memory_operand" "Z"))] + [(set (match_operand:VSX_M2 0 "vsx_register_operand" "=") + (match_operand:VSX_M2 1 "memory_operand" "Z"))] "TARGET_P9_VECTOR" "lxvx %x0,%y1" [(set_attr "type" "vecload") (set_attr "length" "4")]) (define_insn "*p9_vecstore_" - [(set (match_operand:VSX_M 0 "memory_operand" "=Z") - (match_operand:VSX_M 1 "vsx_register_operand" ""))] + [(set (match_operand:VSX_M2 0 "memory_operand" "=Z") + (match_operand:VSX_M2 1 "vsx_register_operand" ""))] "TARGET_P9_VECTOR" "stxvx %x1,%y0" [(set_attr "type" "vecstore") @@ -680,7 +680,7 @@ (rotate:VSX_LE_128 (match_operand:VSX_LE_128 1 "input_operand" ",Z,") (const_int 64)))] - "!BYTES_BIG_ENDIAN && TARGET_VSX" + "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR" "@ xxpermdi %x0,%x1,%x1,2 lxvd2x %x0,%y1 @@ -714,9 +714,9 @@ (define_insn_and_split "*vsx_le_perm_load_" [(set (match_operand:VSX_LE_128 0 "vsx_register_operand" "=") (match_operand:VSX_LE_128 1 "memory_operand" "Z"))] - "!BYTES_BIG_ENDIAN && TARGET_VSX" + "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR" "#" - "!BYTES_BIG_ENDIAN && TARGET_VSX" + "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR" [(set (match_dup 2) (rotate:VSX_LE_128 (match_dup 1) (const_int 64))) @@ -735,7 +735,7 @@ (define_insn "*vsx_le_perm_store_" [(set (match_operand:VSX_LE_128 0 "memory_operand" "=Z") (match_operand:VSX_LE_128 1 "vsx_register_operand" "+"))] - "!BYTES_BIG_ENDIAN && TARGET_VSX" + "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR" "#" [(set_attr "type" "vecstore") (set_attr "length" "12")]) @@ -743,7 +743,7 @@ (define_split [(set (match_operand:VSX_LE_128 0 "memory_operand" "") (match_operand:VSX_LE_128 1 "vsx_register_operand" ""))] - "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed" + "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed && !TARGET_P9_VECTOR" [(set (match_dup 2) (rotate:VSX_LE_128 (match_dup 1) (const_int 64))) @@ -765,7 +765,7 @@ (set (match_operand:TI 2 "vsx_register_operand" "") (rotate:TI (match_dup 0) (const_int 64)))] - "!BYTES_BIG_ENDIAN && TARGET_VSX && TARGET_VSX_TIMODE + "!BYTES_BIG_ENDIAN && TARGET_VSX && TARGET_VSX_TIMODE && !TARGET_P9_VECTOR && (rtx_equal_p (operands[0], operands[2]) || peep2_reg_dead_p (2, operands[0]))" [(set (match_dup 2) (match_dup 1))]) @@ -775,7 +775,7 @@ (define_split [(set (match_operand:VSX_LE_128 0 "memory_operand" "") (match_operand:VSX_LE_128 1 "vsx_register_operand" ""))] - "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed" + "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed && !TARGET_P9_VECTOR" [(set (match_dup 1) (rotate:VSX_LE_128 (match_dup 1) (const_int 64))) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 84581f7b524..ad953153de7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-01-06 Bill Schmidt + + * gcc.target/powerpc/p9-lxvx-stxvx-3.c: New test. + 2016-01-06 Andreas Schwab * gcc.dg/atomic-invalid-2.c: Remove duplicated content. diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c new file mode 100644 index 00000000000..b298173b131 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c @@ -0,0 +1,30 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O3" } */ +/* { dg-final { scan-assembler "lxvx" } } */ +/* { dg-final { scan-assembler "stxvx" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ + +/* Verify P9 vector loads and stores are used rather than the + load-swap/swap-store workarounds for P8. */ +#define SIZE (16384/sizeof(__float128)) + +static __float128 x[SIZE] __attribute__ ((aligned (16))); +static __float128 y[SIZE] __attribute__ ((aligned (16))); +static __float128 a; + +void obfuscate(void *a, ...); + +void __attribute__((noinline)) do_one(void) +{ + unsigned long i; + + obfuscate(x, y, &a); + + for (i = 0; i < SIZE; i++) + y[i] = a * x[i]; + + obfuscate(x, y, &a); +} -- 2.30.2