From 32a4a1a4f86c79d90ed78c2a13cf6b6b67463c19 Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Fri, 3 Apr 2020 12:11:31 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen --- 6f/0278af6c3037f8010a5a5fc6b1b98617c88a67 | 74 +++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 6f/0278af6c3037f8010a5a5fc6b1b98617c88a67 diff --git a/6f/0278af6c3037f8010a5a5fc6b1b98617c88a67 b/6f/0278af6c3037f8010a5a5fc6b1b98617c88a67 new file mode 100644 index 0000000..cbead09 --- /dev/null +++ b/6f/0278af6c3037f8010a5a5fc6b1b98617c88a67 @@ -0,0 +1,74 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 03 Apr 2020 13:11:33 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jKLAa-0008FV-I3; Fri, 03 Apr 2020 13:11:32 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) id 1jKLAY-0008FO-TB + for libre-riscv-dev@lists.libre-riscv.org; Fri, 03 Apr 2020 13:11:30 +0100 +From: bugzilla-daemon@libre-riscv.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 03 Apr 2020 12:11:31 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: whitequark@whitequark.org +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: http://bugs.libre-riscv.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNzYKCi0tLSBDb21t +ZW50ICMzIGZyb20gd2hpdGVxdWFya0B3aGl0ZXF1YXJrLm9yZyAtLS0KT0ssIGhhdmluZyByZWFk +IHRoYXQgSSBzdWdnZXN0IHdlIGZvbGxvdyB0aGUgc3RhbmRhcmQgcHJvY2VkdXJlLiBUaGUgbmV3 +IHB5c2ltCmRlc2lnbiBzaG91bGQgYWxyZWFkeSBoYW5kbGUgdGhpcyBraW5kIG9mIGxvZ2ljIGxv +b3AganVzdCBmaW5lLiBJIHN1Z2dlc3QgeW91Cm1ha2UgYSAoY29hcnNlKSBTUk5BTkQgbGF0Y2gg +b3V0IG9mIG5vcm1hbCAoY29hcnNlKSBOQU5EIGNlbGxzLCB0ZXN0IHRoYXQgaXQKd29ya3MgY29y +cmVjdGx5IGluIHlvdXIgZGVzaWducywgYW5kIGlmIGl0IGRvZXMgbm90LCBmaWxlIGFuIE1DVkUg +b3ZlciBhdCB0aGUKbm1pZ2VuIHJlcG9zaXRvcnkuIFRoZW4gSSBpbnZlc3RpZ2F0ZSBhbmQgZml4 +IGFueSBpc3N1ZXMuIFRoZSBzYW1lIHdpdGggY3h4c2ltCm9uY2UgaXQncyByZWFkeS4KClJlZ2Fy +ZGluZyBoaWVyYXJjaGljYWwgZGVzaWduIHNsb3dkb3duOiB0aGlzIGlzIGluZXZpdGFibGUgaW4g +dGhlIGN1cnJlbnQgcHlzaW0KYXJjaGl0ZWN0dXJlLCBidXQgY3h4c2ltIGNhbiB0cml2aWFsbHkg +dXNlIHRoZSBZb3N5cyBmbGF0dGVuaW5nIGZ1bmN0aW9uYWxpdHkKYW5kIGRvZXMgbm90IHN1ZmZl +ciBmcm9tIGFueSBoaWVyYXJjaHktcmVsYXRlZCBpc3N1ZXMuCgotLSAKWW91IGFyZSByZWNlaXZp +bmcgdGhpcyBtYWlsIGJlY2F1c2U6CllvdSBhcmUgb24gdGhlIENDIGxpc3QgZm9yIHRoZSBidWcu +Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpYnJlLXJp +c2N2LWRldiBtYWlsaW5nIGxpc3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9y +ZwpodHRwOi8vbGlzdHMubGlicmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGluZm8vbGlicmUtcmlz +Y3YtZGV2Cg== + -- 2.30.2