From 331f1cbe1ca41ca35f74a97739688f496241e0cd Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Thu, 16 Mar 2006 19:09:48 +0000 Subject: [PATCH] * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the logic to identify halfword shifts. --- opcodes/ChangeLog | 5 ++ opcodes/bfin-dis.c | 136 +++++++++------------------------------------ 2 files changed, 32 insertions(+), 109 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 135cf202942..ae0eb648c08 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2006-03-16 Bernd Schmidt + + * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the + logic to identify halfword shifts. + 2006-03-16 Paul Brook * arm-dis.c (arm_opcodes): Rename swi to svc. diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index adeb7d072da..0dc29224b11 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -4034,130 +4034,48 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); - if (HLs == 0 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 1 && sop == 0 && sopcde == 0) + if (sop == 0 && sopcde == 0) { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 2 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 3 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >>> "); OUTS (outf, uimm4 (newimmag)); } - else if (HLs == 0 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 1 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 2 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 3 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0) + else if (sop == 1 && sopcde == 0 && bit8 == 0) { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " << "); OUTS (outf, uimm4 (immag)); + OUTS (outf, " (S)"); } - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 1 && sop == 2 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1) + else if (sop == 1 && sopcde == 0 && bit8 == 1) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >>> "); OUTS (outf, uimm4 (newimmag)); + OUTS (outf, " (S)"); } - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0) + else if (sop == 2 && sopcde == 0 && bit8 == 0) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " << "); OUTS (outf, uimm4 (immag)); } - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1) + else if (sop == 2 && sopcde == 0 && bit8 == 1) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >> "); OUTS (outf, uimm4 (newimmag)); } - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - } else if (sop == 2 && sopcde == 3 && HLs == 1) { OUTS (outf, "A1= ROT A1 BY "); -- 2.30.2