From 33646a8eedffb587f13283f975f9c184a4c26bd8 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Wed, 6 Apr 2022 19:35:29 -0700 Subject: [PATCH] clean up code --- src/nmigen_gf/hdl/clmul.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/nmigen_gf/hdl/clmul.py b/src/nmigen_gf/hdl/clmul.py index 8f79c5e..a3831aa 100644 --- a/src/nmigen_gf/hdl/clmul.py +++ b/src/nmigen_gf/hdl/clmul.py @@ -54,7 +54,7 @@ class CLMulAdd(Elaboratable): # build terms at requested widths (if any) self.terms = [] for i, inp in enumerate(self.term_widths): - self.terms.append(Signal(inp, name=f"term_%d" % i)) + self.terms.append(Signal(inp, name=f"term_{i}")) # build output at the maximum bit-width covering all inputs self.output = Signal(max((self.factor_width * 2 - 1, -- 2.30.2