From 33f9bd2a1d2c92c7c1c9d9d60151b93c554016b1 Mon Sep 17 00:00:00 2001 From: whitequark Date: Sun, 21 Apr 2019 07:16:59 +0000 Subject: [PATCH] hdl.ast: accept Signals with identical min/max bounds. And produce a 0-bit signal. Fixes #58. --- nmigen/hdl/ast.py | 12 ++++++++---- nmigen/test/test_hdl_ast.py | 11 ++++++++--- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/nmigen/hdl/ast.py b/nmigen/hdl/ast.py index 3a42220..37816ce 100644 --- a/nmigen/hdl/ast.py +++ b/nmigen/hdl/ast.py @@ -593,11 +593,15 @@ class Signal(Value, DUID): if max is None: max = 2 max -= 1 # make both bounds inclusive - if not min < max: - raise ValueError("Lower bound {} should be less than higher bound {}" - .format(min, max)) + if min > max: + raise ValueError("Lower bound {} should be less or equal to higher bound {}" + .format(min, max + 1)) self.signed = min < 0 or max < 0 - self.nbits = builtins.max(bits_for(min, self.signed), bits_for(max, self.signed)) + if min == max: + self.nbits = 0 + else: + self.nbits = builtins.max(bits_for(min, self.signed), + bits_for(max, self.signed)) else: if not (min is None and max is None): diff --git a/nmigen/test/test_hdl_ast.py b/nmigen/test/test_hdl_ast.py index 608870f..d2cc4cd 100644 --- a/nmigen/test/test_hdl_ast.py +++ b/nmigen/test/test_hdl_ast.py @@ -414,13 +414,18 @@ class SignalTestCase(FHDLTestCase): self.assertEqual(s8.shape(), (6, True)) s9 = Signal(0) self.assertEqual(s9.shape(), (0, False)) + s10 = Signal(max=1) + self.assertEqual(s10.shape(), (0, False)) def test_shape_bad(self): - with self.assertRaises(ValueError): + with self.assertRaises(ValueError, + msg="Lower bound 10 should be less or equal to higher bound 4"): Signal(min=10, max=4) - with self.assertRaises(ValueError): + with self.assertRaises(ValueError, + msg="Only one of bits/signedness or bounds may be specified"): Signal(2, min=10) - with self.assertRaises(TypeError): + with self.assertRaises(TypeError, + msg="Width must be a non-negative integer, not '-10'"): Signal(-10) def test_name(self): -- 2.30.2