From 33faef6a34023217b605ca11f519e0c1cd74b51b Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 27 Feb 2020 08:47:54 +0100 Subject: [PATCH] ac: rename vgpr_alloc_granularity to wave64_vgpr_alloc_granularity MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit And update the value. Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák Part-of: --- src/amd/common/ac_gpu_info.c | 4 ++-- src/amd/common/ac_gpu_info.h | 2 +- src/amd/vulkan/radv_device.c | 2 +- src/amd/vulkan/radv_rgp.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 45be8492d0f..353dfe91b81 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -729,7 +729,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, info->min_vgpr_alloc = 4; info->max_vgpr_alloc = 256; - info->vgpr_alloc_granularity = info->chip_class >= GFX10 ? 8 : 4; + info->wave64_vgpr_alloc_granularity = 4; info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256; info->num_simd_per_compute_unit = info->chip_class >= GFX10 ? 2 : 4; @@ -895,7 +895,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf(" sgpr_alloc_granularity = %i\n", info->sgpr_alloc_granularity); printf(" min_vgpr_alloc = %i\n", info->min_vgpr_alloc); printf(" max_vgpr_alloc = %i\n", info->max_vgpr_alloc); - printf(" vgpr_alloc_granularity = %i\n", info->vgpr_alloc_granularity); + printf(" wave64_vgpr_alloc_granularity = %i\n", info->wave64_vgpr_alloc_granularity); printf("Render backend info:\n"); printf(" pa_sc_tile_steering_override = 0x%x\n", info->pa_sc_tile_steering_override); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index ce8c6e43c71..930a09bab29 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -167,7 +167,7 @@ struct radeon_info { uint32_t sgpr_alloc_granularity; uint32_t min_vgpr_alloc; uint32_t max_vgpr_alloc; - uint32_t vgpr_alloc_granularity; + uint32_t wave64_vgpr_alloc_granularity; /* Render backends (color + depth blocks). */ uint32_t r300_num_gb_pipes; diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index aa7b1b06835..8e4ae16d51a 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1724,7 +1724,7 @@ void radv_GetPhysicalDeviceProperties2( properties->maxVgprAllocation = pdevice->rad_info.max_vgpr_alloc; properties->vgprAllocationGranularity = - pdevice->rad_info.vgpr_alloc_granularity; + pdevice->rad_info.wave64_vgpr_alloc_granularity; break; } case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_2_AMD: { diff --git a/src/amd/vulkan/radv_rgp.c b/src/amd/vulkan/radv_rgp.c index 03d7ed81119..8b068ae2200 100644 --- a/src/amd/vulkan/radv_rgp.c +++ b/src/amd/vulkan/radv_rgp.c @@ -358,7 +358,7 @@ radv_fill_sqtt_asic_info(struct radv_device *device, chunk->wavefronts_per_simd = rad_info->max_wave64_per_simd; chunk->minimum_vgpr_alloc = rad_info->min_vgpr_alloc; - chunk->vgpr_alloc_granularity = rad_info->vgpr_alloc_granularity; + chunk->vgpr_alloc_granularity = rad_info->wave64_vgpr_alloc_granularity; chunk->minimum_sgpr_alloc = rad_info->min_sgpr_alloc; chunk->sgpr_alloc_granularity = rad_info->sgpr_alloc_granularity; -- 2.30.2