From 33fb3497e916f5d905c898bcc78f68881b1c5e8d Mon Sep 17 00:00:00 2001 From: whitequark Date: Thu, 13 Dec 2018 04:34:22 +0000 Subject: [PATCH] back.rtlil: fix swapped operands in sync assign. --- nmigen/back/rtlil.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/nmigen/back/rtlil.py b/nmigen/back/rtlil.py index 490e3e7..0e06d20 100644 --- a/nmigen/back/rtlil.py +++ b/nmigen/back/rtlil.py @@ -495,9 +495,9 @@ def convert_fragment(builder, fragment, name, top, clock_domains): for trigger in triggers: with process.sync(*trigger) as sync: for signal in signals: - rhs_sigspec = xformer(signal) + lhs_sigspec = xformer(signal) with xformer.lhs(): - sync.update(xformer(signal), rhs_sigspec) + sync.update(lhs_sigspec, xformer(signal)) # Finally, collect the names we've given to our ports in RTLIL, and correlate these with # the signals represented by these ports. If we are a submodule, this will be necessary -- 2.30.2