From 3421ae832b0acc3596c90b5963b7f80559c3de87 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Wed, 27 Sep 2023 08:35:17 +0100 Subject: [PATCH] Added english language description and brackets for ldbrx instruction --- openpower/isa/fixedload.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 337e7c53..233b45ed 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -720,6 +720,22 @@ Pseudo-code: || load_data[24:31] || load_data[16:23] || load_data[8:15] || load_data[0:7]) +Description: + + Let the effective address (EA) be the sum (RA|0)+(RB). + Bits 0:7 of the doubleword in storage addressed by EA + are loaded into RT[56:63] . Bits 8:15 of the doubleword in + storage addressed by EA are loaded into RT[48:55] . Bits + 16:23 of the doubleword in storage addressed by EA + are loaded into RT[40:47]. Bits 24:31 of the doubleword in + storage addressed by EA are loaded into RT 32:39 . Bits + 32:39 of the doubleword in storage addressed by EA + are loaded into RT[24:31]. Bits 40:47 of the doubleword in + storage addressed by EA are loaded into RT[16:23] . Bits + 48:55 of the doubleword in storage addressed by EA + are loaded into RT[8:15] . Bits 56:63 of the doubleword in + storage addressed by EA are loaded into RT[0:7] . + Special Registers Altered: None -- 2.30.2