From 34254f4b3c7c7ceb49fbf806014f0d90eee9011a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 30 Jun 2020 12:20:56 +0100 Subject: [PATCH] whoops double headings --- openpower/isa/bcd.mdwn | 2 -- openpower/isa/branch.mdwn | 4 ---- openpower/isa/comparefixed.mdwn | 5 ----- openpower/isa/condition.mdwn | 8 ------- openpower/isa/fixedarith.mdwn | 40 --------------------------------- openpower/isa/fixedload.mdwn | 27 ---------------------- openpower/isa/fixedlogical.mdwn | 27 ---------------------- openpower/isa/fixedshift.mdwn | 17 -------------- openpower/isa/fixedstore.mdwn | 20 ----------------- openpower/isa/fixedtrap.mdwn | 4 ---- openpower/isa/sprset.mdwn | 9 -------- openpower/isa/stringldst.mdwn | 3 --- openpower/isa/system.mdwn | 4 ---- 13 files changed, 170 deletions(-) diff --git a/openpower/isa/bcd.mdwn b/openpower/isa/bcd.mdwn index 6704422a3..c34561f26 100644 --- a/openpower/isa/bcd.mdwn +++ b/openpower/isa/bcd.mdwn @@ -17,7 +17,6 @@ Special Registers Altered: None # Add and Generate Sixes -# Add and Generate Sixes XO-Form @@ -38,7 +37,6 @@ Special Registers Altered: None # Convert Binary Coded Decimal To Declets -# Convert Binary Coded Decimal To Declets X-Form diff --git a/openpower/isa/branch.mdwn b/openpower/isa/branch.mdwn index f9477e738..ff09f6a5e 100644 --- a/openpower/isa/branch.mdwn +++ b/openpower/isa/branch.mdwn @@ -18,7 +18,6 @@ Special Registers Altered: LR (if LK=1) # Branch Conditional -# Branch Conditional B-Form @@ -45,7 +44,6 @@ Special Registers Altered: LR (if LK=1) # Branch Conditional to Link Register -# Branch Conditional to Link Register XL-Form @@ -68,7 +66,6 @@ Special Registers Altered: LR (if LK=1) # Branch Conditional to Count Register -# Branch Conditional to Count Register XL-Form @@ -86,7 +83,6 @@ Special Registers Altered: LR (if LK=1) # Branch Conditional to Branch Target Address Register -# Branch Conditional to Branch Target Address Register XL-Form diff --git a/openpower/isa/comparefixed.mdwn b/openpower/isa/comparefixed.mdwn index 48e45ec35..5b77ff27b 100644 --- a/openpower/isa/comparefixed.mdwn +++ b/openpower/isa/comparefixed.mdwn @@ -18,7 +18,6 @@ Special Registers Altered: CR field BF # Compare -# Compare X-Form @@ -42,7 +41,6 @@ Special Registers Altered: CR field BF # Compare Logical Immediate -# Compare Logical Immediate D-Form @@ -62,7 +60,6 @@ Special Registers Altered: CR field BF # Compare Logical -# Compare Logical X-Form @@ -86,7 +83,6 @@ Special Registers Altered: CR field BF # Compare Ranged Byte -# Compare Ranged Byte X-Form @@ -114,7 +110,6 @@ Special Registers Altered: CR field BF # Compare Equal Byte -# Compare Equal Byte X-Form diff --git a/openpower/isa/condition.mdwn b/openpower/isa/condition.mdwn index d5e681989..6dd831d42 100644 --- a/openpower/isa/condition.mdwn +++ b/openpower/isa/condition.mdwn @@ -13,7 +13,6 @@ Special Registers Altered: CR[BT+32] # Condition Register NAND -# Condition Register NAND XL-Form @@ -28,7 +27,6 @@ Special Registers Altered: CR[BT+32] # Condition Register OR -# Condition Register OR XL-Form @@ -43,7 +41,6 @@ Special Registers Altered: CR[BT+32] # Condition Register XOR -# Condition Register XOR XL-Form @@ -58,7 +55,6 @@ Special Registers Altered: CR[BT+32] # Condition Register NOR -# Condition Register NOR XL-Form @@ -73,7 +69,6 @@ Special Registers Altered: CR[BT+32] # Condition Register Equivalent -# Condition Register Equivalent XL-Form @@ -88,7 +83,6 @@ Special Registers Altered: CR[BT+32] # Condition Register AND with Complement -# Condition Register AND with Complement XL-Form @@ -103,7 +97,6 @@ Special Registers Altered: CR[BT+32] # Condition Register OR with Complement -# Condition Register OR with Complement XL-Form @@ -118,7 +111,6 @@ Special Registers Altered: CR[BT+32] # Move Condition Register Field -# Move Condition Register Field XL-Form diff --git a/openpower/isa/fixedarith.mdwn b/openpower/isa/fixedarith.mdwn index 251aaa701..ec4688d5b 100644 --- a/openpower/isa/fixedarith.mdwn +++ b/openpower/isa/fixedarith.mdwn @@ -14,7 +14,6 @@ Special Registers Altered: None # Add Immediate Shifted -# Add Immediate Shifted D-Form @@ -30,7 +29,6 @@ Special Registers Altered: None # Add PC Immediate Shifted -# Add PC Immediate Shifted DX-Form @@ -46,7 +44,6 @@ Special Registers Altered: None # Add -# Add XO-Form @@ -65,7 +62,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Subtract From -# Subtract From XO-Form @@ -84,7 +80,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Add Immediate Carrying -# Add Immediate Carrying D-Form @@ -99,7 +94,6 @@ Special Registers Altered: CA CA32 # Add Immediate Carrying and Record -# Add Immediate Carrying and Record D-Form @@ -114,7 +108,6 @@ Special Registers Altered: CR0 CA CA32 # Subtract From Immediate Carrying -# Subtract From Immediate Carrying D-Form @@ -129,7 +122,6 @@ Special Registers Altered: CA CA32 # Add Carrying -# Add Carrying XO-Form @@ -149,7 +141,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Subtract From Carrying -# Subtract From Carrying XO-Form @@ -169,7 +160,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Add Extended -# Add Extended XO-Form @@ -189,7 +179,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Subtract From Extended -# Subtract From Extended XO-Form @@ -209,7 +198,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Add to Minus One Extended -# Add to Minus One Extended XO-Form @@ -229,7 +217,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Subtract From Minus One Extended -# Subtract From Minus One Extended XO-Form @@ -249,7 +236,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Add Extended using alternate carry bit -# Add Extended using alternate carry bit Z23-Form @@ -264,7 +250,6 @@ Special Registers Altered: OV OV32 (if CY=0 ) # Subtract From Zero Extended -# Subtract From Zero Extended XO-Form @@ -284,7 +269,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Add to Zero Extended -# Add to Zero Extended XO-Form @@ -304,7 +288,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Negate -# Negate XO-Form @@ -323,7 +306,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Multiply Low Immediate -# Multiply Low Immediate D-Form @@ -339,7 +321,6 @@ Special Registers Altered: None # Multiply High Word -# Multiply High Word XO-Form @@ -357,7 +338,6 @@ Special Registers Altered: CR0 (bits 0:2 undefined in 64-bit mode) (if Rc=1) # Multiply Low Word -# Multiply Low Word XO-Form @@ -376,7 +356,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Multiply High Word Unsigned -# Multiply High Word Unsigned XO-Form @@ -394,7 +373,6 @@ Special Registers Altered: CR0 (bits 0:2 undefined in 64-bit mode) (if Rc=1) # Divide Word -# Divide Word XO-Form @@ -423,7 +401,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Word Unsigned -# Divide Word Unsigned XO-Form @@ -450,7 +427,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Word Extended -# Divide Word Extended XO-Form @@ -482,7 +458,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Word Extended Unsigned -# Divide Word Extended Unsigned XO-Form @@ -514,7 +489,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Modulo Signed Word -# Modulo Signed Word X-Form @@ -539,7 +513,6 @@ Special Registers Altered: None # Modulo Unsigned Word -# Modulo Unsigned Word X-Form @@ -562,7 +535,6 @@ Special Registers Altered: None # Deliver A Random Number -# Deliver A Random Number X-Form @@ -577,7 +549,6 @@ Special Registers Altered: none # Multiply Low Doubleword -# Multiply Low Doubleword XO-Form @@ -597,7 +568,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Multiply High Doubleword -# Multiply High Doubleword XO-Form @@ -614,7 +584,6 @@ Special Registers Altered: CR0 (if Rc=1) # Multiply High Doubleword Unsigned -# Multiply High Doubleword Unsigned XO-Form @@ -631,7 +600,6 @@ Special Registers Altered: CR0 (if Rc=1) # Multiply-Add High Doubleword VA-Form -# Multiply-Add High Doubleword VA-Form VA-Form @@ -648,7 +616,6 @@ Special Registers Altered: None # Multiply-Add High Doubleword Unsigned -# Multiply-Add High Doubleword Unsigned VA-Form @@ -665,7 +632,6 @@ Special Registers Altered: None # Multiply-Add Low Doubleword -# Multiply-Add Low Doubleword VA-Form @@ -682,7 +648,6 @@ Special Registers Altered: None # Divide Doubleword -# Divide Doubleword XO-Form @@ -710,7 +675,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Doubleword Unsigned -# Divide Doubleword Unsigned XO-Form @@ -736,7 +700,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Doubleword Extended -# Divide Doubleword Extended XO-Form @@ -767,7 +730,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Divide Doubleword Extended Unsigned -# Divide Doubleword Extended Unsigned XO-Form @@ -798,7 +760,6 @@ Special Registers Altered: SO OV OV32 (if OE=1) # Modulo Signed Doubleword -# Modulo Signed Doubleword X-Form @@ -822,7 +783,6 @@ Special Registers Altered: None # Modulo Unsigned Doubleword -# Modulo Unsigned Doubleword X-Form diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 7c2d1d8ad..0349591fd 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -15,7 +15,6 @@ Special Registers Altered: None # Load Byte and Zero Indexed -# Load Byte and Zero Indexed X-Form @@ -32,7 +31,6 @@ Special Registers Altered: None # Load Byte and Zero with Update -# Load Byte and Zero with Update D-Form @@ -49,7 +47,6 @@ Special Registers Altered: None # Load Byte and Zero with Update Indexed -# Load Byte and Zero with Update Indexed X-Form @@ -66,7 +63,6 @@ Special Registers Altered: None # Load Halfword and Zero -# Load Halfword and Zero D-Form @@ -83,7 +79,6 @@ Special Registers Altered: None # Load Halfword and Zero Indexed -# Load Halfword and Zero Indexed X-Form @@ -100,7 +95,6 @@ Special Registers Altered: None # Load Halfword and Zero with Update -# Load Halfword and Zero with Update D-Form @@ -117,7 +111,6 @@ Special Registers Altered: None # Load Halfword and Zero with Update Indexed -# Load Halfword and Zero with Update Indexed X-Form @@ -134,7 +127,6 @@ Special Registers Altered: None # Load Halfword Algebraic -# Load Halfword Algebraic D-Form @@ -151,7 +143,6 @@ Special Registers Altered: None # Load Halfword Algebraic Indexed -# Load Halfword Algebraic Indexed X-Form @@ -168,7 +159,6 @@ Special Registers Altered: None # Load Halfword Algebraic with Update -# Load Halfword Algebraic with Update D-Form @@ -185,7 +175,6 @@ Special Registers Altered: None # Load Halfword Algebraic with Update Indexed -# Load Halfword Algebraic with Update Indexed X-Form @@ -202,7 +191,6 @@ Special Registers Altered: None # Load Word and Zero -# Load Word and Zero D-Form @@ -219,7 +207,6 @@ Special Registers Altered: None # Load Word and Zero Indexed -# Load Word and Zero Indexed X-Form @@ -236,7 +223,6 @@ Special Registers Altered: None # Load Word and Zero with Update -# Load Word and Zero with Update D-Form @@ -253,7 +239,6 @@ Special Registers Altered: None # Load Word and Zero with Update Indexed -# Load Word and Zero with Update Indexed X-Form @@ -270,7 +255,6 @@ Special Registers Altered: None # Load Word Algebraic -# Load Word Algebraic D-Form @@ -287,7 +271,6 @@ Special Registers Altered: None # Load Word Algebraic Indexed -# Load Word Algebraic Indexed X-Form @@ -304,7 +287,6 @@ Special Registers Altered: None # Load Word Algebraic with Update Indexed -# Load Word Algebraic with Update Indexed X-Form @@ -321,7 +303,6 @@ Special Registers Altered: None # Load Doubleword -# Load Doubleword DS-Form @@ -338,7 +319,6 @@ Special Registers Altered: None # Load Doubleword Indexed -# Load Doubleword Indexed X-Form @@ -355,7 +335,6 @@ Special Registers Altered: None # Load Doubleword with Update Indexed -# Load Doubleword with Update Indexed DS-Form @@ -372,7 +351,6 @@ Special Registers Altered: None # Load Doubleword with Update Indexed -# Load Doubleword with Update Indexed X-Form @@ -389,7 +367,6 @@ Special Registers Altered: None # Load Quadword -# Load Quadword DQ-Form @@ -406,7 +383,6 @@ Special Registers Altered: None # Load Halfword Byte-Reverse Indexed -# Load Halfword Byte-Reverse Indexed X-Form @@ -424,7 +400,6 @@ Special Registers Altered: None # Load Word Byte-Reverse Indexed -# Load Word Byte-Reverse Indexed X-Form @@ -443,7 +418,6 @@ Special Registers Altered: None # Load Doubleword Byte-Reverse Indexed -# Load Doubleword Byte-Reverse Indexed X-Form @@ -464,7 +438,6 @@ Special Registers Altered: None # Load Multiple Word -# Load Multiple Word DQ-Form diff --git a/openpower/isa/fixedlogical.mdwn b/openpower/isa/fixedlogical.mdwn index a6498caee..13fdf8d39 100644 --- a/openpower/isa/fixedlogical.mdwn +++ b/openpower/isa/fixedlogical.mdwn @@ -13,7 +13,6 @@ Special Registers Altered: CR0 # OR Immediate -# OR Immediate D-Form @@ -28,7 +27,6 @@ Special Registers Altered: None # AND Immediate Shifted -# AND Immediate Shifted D-Form @@ -43,7 +41,6 @@ Special Registers Altered: CR0 # OR Immediate Shifted -# OR Immediate Shifted D-Form @@ -58,7 +55,6 @@ Special Registers Altered: None # XOR Immediate Shifted -# XOR Immediate Shifted D-Form @@ -73,7 +69,6 @@ Special Registers Altered: None # XOR Immediate -# XOR Immediate D-Form @@ -88,7 +83,6 @@ Special Registers Altered: None # AND -# AND X-Form @@ -104,7 +98,6 @@ Special Registers Altered: CR0 (if Rc=1) # OR -# OR X-Form @@ -120,7 +113,6 @@ Special Registers Altered: CR0 (if Rc=1) # XOR -# XOR X-Form @@ -136,7 +128,6 @@ Special Registers Altered: CR0 (if Rc=1) # NAND -# NAND X-Form @@ -152,7 +143,6 @@ Special Registers Altered: CR0 (if Rc=1) # NOR -# NOR X-Form @@ -168,7 +158,6 @@ Special Registers Altered: CR0 (if Rc=1) # Equivalent -# Equivalent X-Form @@ -184,7 +173,6 @@ Special Registers Altered: CR0 (if Rc=1) # AND with Complement -# AND with Complement X-Form @@ -200,7 +188,6 @@ Special Registers Altered: CR0 (if Rc=1) # OR with Complement -# OR with Complement X-Form @@ -216,7 +203,6 @@ Special Registers Altered: CR0 (if Rc=1) # Extend Sign Byte -# Extend Sign Byte X-Form @@ -234,7 +220,6 @@ Special Registers Altered: CR0 (if Rc=1) # Extend Sign Halfword -# Extend Sign Halfword X-Form @@ -252,7 +237,6 @@ Special Registers Altered: CR0 (if Rc=1) # Count Leading Zeros Word -# Count Leading Zeros Word X-Form @@ -273,7 +257,6 @@ Special Registers Altered: CR0 (if Rc=1) # Count Trailing Zeros Word -# Count Trailing Zeros Word X-Form @@ -294,7 +277,6 @@ Special Registers Altered: CR0 (if Rc=1) # Compare Bytes -# Compare Bytes X-Form @@ -313,7 +295,6 @@ Special Registers Altered: None # Population Count Bytes -# Population Count Bytes X-Form @@ -333,7 +314,6 @@ Special Registers Altered: None # Population Count Words -# Population Count Words X-Form @@ -353,7 +333,6 @@ Special Registers Altered: None # Parity Doubleword -# Parity Doubleword X-Form @@ -371,7 +350,6 @@ Special Registers Altered: None # Parity Word -# Parity Word X-Form @@ -393,7 +371,6 @@ Special Registers Altered: None # Extend Sign Word -# Extend Sign Word X-Form @@ -411,7 +388,6 @@ Special Registers Altered: CR0 (if Rc=1) # Population Count Doubleword -# Population Count Doubleword X-Form @@ -430,7 +406,6 @@ Special Registers Altered: None # Count Leading Zeros Doubleword -# Count Leading Zeros Doubleword X-Form @@ -451,7 +426,6 @@ Special Registers Altered: CR0 (if Rc=1) # Count Trailing Zeros Doubleword -# Count Trailing Zeros Doubleword X-Form @@ -472,7 +446,6 @@ Special Registers Altered: CR0 (if Rc=1) # Bit Permute Doubleword -# Bit Permute Doubleword X-Form diff --git a/openpower/isa/fixedshift.mdwn b/openpower/isa/fixedshift.mdwn index 7449fd442..7e74bfb68 100644 --- a/openpower/isa/fixedshift.mdwn +++ b/openpower/isa/fixedshift.mdwn @@ -17,7 +17,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Word then AND with Mask -# Rotate Left Word then AND with Mask M-Form @@ -36,7 +35,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Word Immediate then Mask Insert -# Rotate Left Word Immediate then Mask Insert M-Form @@ -55,7 +53,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword Immediate then Clear Left -# Rotate Left Doubleword Immediate then Clear Left MD-Form @@ -75,7 +72,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword Immediate then Clear Right -# Rotate Left Doubleword Immediate then Clear Right MD-Form @@ -95,7 +91,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword Immediate then Clear -# Rotate Left Doubleword Immediate then Clear MD-Form @@ -115,7 +110,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword then Clear Left -# Rotate Left Doubleword then Clear Left MDS-Form @@ -135,7 +129,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword then Clear Right -# Rotate Left Doubleword then Clear Right MDS-Form @@ -155,7 +148,6 @@ Special Registers Altered: CR0 (if Rc=1) # Rotate Left Doubleword Immediate then Mask Insert -# Rotate Left Doubleword Immediate then Mask Insert MD-Form @@ -175,7 +167,6 @@ Special Registers Altered: CR0 (if Rc=1) -# Shift Left Word # Shift Left Word X-Form @@ -197,7 +188,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Word -# Shift Right Word X-Form @@ -218,7 +208,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Algebraic Word Immediate -# Shift Right Algebraic Word Immediate X-Form @@ -242,7 +231,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Algebraic Word -# Shift Right Algebraic Word X-Form @@ -268,7 +256,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Left Doubleword -# Shift Left Doubleword X-Form @@ -289,7 +276,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Doubleword -# Shift Right Doubleword X-Form @@ -310,7 +296,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Algebraic Doubleword Immediate -# Shift Right Algebraic Doubleword Immediate XS-Form @@ -334,7 +319,6 @@ Special Registers Altered: CR0 (if Rc=1) # Shift Right Algebraic Doubleword -# Shift Right Algebraic Doubleword X-Form @@ -360,7 +344,6 @@ Special Registers Altered: CR0 (if Rc=1) # Extend-Sign Word and Shift Left Immediate -# Extend-Sign Word and Shift Left Immediate XS-Form diff --git a/openpower/isa/fixedstore.mdwn b/openpower/isa/fixedstore.mdwn index e9777c430..1a8fe1152 100644 --- a/openpower/isa/fixedstore.mdwn +++ b/openpower/isa/fixedstore.mdwn @@ -15,7 +15,6 @@ Special Registers Altered: None # Store Byte Indexed -# Store Byte Indexed X-Form @@ -32,7 +31,6 @@ Special Registers Altered: None # Store Byte with Update -# Store Byte with Update D-Form @@ -49,7 +47,6 @@ Special Registers Altered: None # Store Byte with Update Indexed -# Store Byte with Update Indexed X-Form @@ -66,7 +63,6 @@ Special Registers Altered: None # Store Halfword -# Store Halfword D-Form @@ -83,7 +79,6 @@ Special Registers Altered: None # Store Halfword Indexed -# Store Halfword Indexed X-Form @@ -100,7 +95,6 @@ Special Registers Altered: None # Store Halfword with Update -# Store Halfword with Update D-Form @@ -117,7 +111,6 @@ Special Registers Altered: None # Store Halfword with Update Indexed -# Store Halfword with Update Indexed X-Form @@ -134,7 +127,6 @@ Special Registers Altered: None # Store Word -# Store Word D-Form @@ -151,7 +143,6 @@ Special Registers Altered: None # Store Word Indexed -# Store Word Indexed X-Form @@ -168,7 +159,6 @@ Special Registers Altered: None # Store Word with Update -# Store Word with Update D-Form @@ -185,7 +175,6 @@ Special Registers Altered: None # Store Word with Update Indexed -# Store Word with Update Indexed X-Form @@ -202,7 +191,6 @@ Special Registers Altered: None # Store Doubleword -# Store Doubleword DS-Form @@ -219,7 +207,6 @@ Special Registers Altered: None # Store Doubleword Indexed -# Store Doubleword Indexed X-Form @@ -236,7 +223,6 @@ Special Registers Altered: None # Store Doubleword with Update -# Store Doubleword with Update DS-Form @@ -253,7 +239,6 @@ Special Registers Altered: None # Store Doubleword with Update Indexed -# Store Doubleword with Update Indexed X-Form @@ -270,7 +255,6 @@ Special Registers Altered: None # Store Quadword -# Store Quadword DS-Form @@ -287,7 +271,6 @@ Special Registers Altered: None # Store Halfword Byte-Reverse Indexed -# Store Halfword Byte-Reverse Indexed X-Form @@ -304,7 +287,6 @@ Special Registers Altered: None # Store Word Byte-Reverse Indexed -# Store Word Byte-Reverse Indexed X-Form @@ -322,7 +304,6 @@ Special Registers Altered: None # Store Doubleword Byte-Reverse Indexed -# Store Doubleword Byte-Reverse Indexed X-Form @@ -342,7 +323,6 @@ Special Registers Altered: None # Store Multiple Word -# Store Multiple Word D-Form diff --git a/openpower/isa/fixedtrap.mdwn b/openpower/isa/fixedtrap.mdwn index 71d6e74d9..7bb664933 100644 --- a/openpower/isa/fixedtrap.mdwn +++ b/openpower/isa/fixedtrap.mdwn @@ -18,7 +18,6 @@ Special Registers Altered: None # Trap Word -# Trap Word X-Form @@ -39,7 +38,6 @@ Special Registers Altered: None # Trap Doubleword Immediate -# Trap Doubleword Immediate D-Form @@ -60,7 +58,6 @@ Special Registers Altered: None # Trap Doubleword -# Trap Doubleword X-Form @@ -81,7 +78,6 @@ Special Registers Altered: None # Integer Select -# Integer Select A-Form diff --git a/openpower/isa/sprset.mdwn b/openpower/isa/sprset.mdwn index ba1445bc2..9582d395e 100644 --- a/openpower/isa/sprset.mdwn +++ b/openpower/isa/sprset.mdwn @@ -21,7 +21,6 @@ Special Registers Altered: See spec 3.3.17 # Move From Special Purpose Register -# Move From Special Purpose Register XFX-Form @@ -44,7 +43,6 @@ Special Registers Altered: None # Move to CR from XER Extended -# Move to CR from XER Extended X-Form @@ -59,7 +57,6 @@ Special Registers Altered: CR field BF # Move To One Condition Register Field -# Move To One Condition Register Field XFX-Form @@ -81,7 +78,6 @@ Special Registers Altered: CR field selected by FXM # Move To Condition Register Fields -# Move To Condition Register Fields XFX-Form @@ -98,7 +94,6 @@ Special Registers Altered: CR fields selected by mask # Move From One Condition Register Field -# Move From One Condition Register Field XFX-Form @@ -121,7 +116,6 @@ Special Registers Altered: None # Move From Condition Register -# Move From Condition Register XFX-Form @@ -136,7 +130,6 @@ Special Registers Altered: None # Set Boolean -# Set Boolean X-Form @@ -156,7 +149,6 @@ Special Registers Altered: None # Move To Machine State Register -# Move To Machine State Register X-Form @@ -182,7 +174,6 @@ Special Registers Altered: MSR # Move From Machine State Register -# Move From Machine State Register X-Form diff --git a/openpower/isa/stringldst.mdwn b/openpower/isa/stringldst.mdwn index a7bc46ff3..9a7ac1af0 100644 --- a/openpower/isa/stringldst.mdwn +++ b/openpower/isa/stringldst.mdwn @@ -26,7 +26,6 @@ Special Registers Altered: None # Load String Word Indexed -# Load String Word Indexed X-Form @@ -55,7 +54,6 @@ Special Registers Altered: None # Store String Word Immediate -# Store String Word Immediate X-Form @@ -81,7 +79,6 @@ Special Registers Altered: None # Store String Word Indexed -# Store String Word Indexed X-Form diff --git a/openpower/isa/system.mdwn b/openpower/isa/system.mdwn index a84db9353..a640ea375 100644 --- a/openpower/isa/system.mdwn +++ b/openpower/isa/system.mdwn @@ -20,7 +20,6 @@ Special Registers Altered: SRR0 SRR1 MSR # System Call Vectored -# System Call Vectored SC-Form @@ -42,7 +41,6 @@ Special Registers Altered: LR CTR MSR # Return From System Call Vectored -# Return From System Call Vectored XL-Form @@ -69,7 +67,6 @@ Special Registers Altered: MSR # Return From Interrupt Doubleword -# Return From Interrupt Doubleword XL-Form @@ -98,7 +95,6 @@ Special Registers Altered: MSR # Hypervisor Return From Interrupt Doubleword -# Hypervisor Return From Interrupt Doubleword XL-Form -- 2.30.2