From 345966dcdd05e6b87fe140691d782c6ec8d7c023 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 17 Oct 2023 13:23:53 +0100
Subject: [PATCH] Updated instruction names for pifpload.mdwm

---
 openpower/isa/pifpload.mdwn | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/openpower/isa/pifpload.mdwn b/openpower/isa/pifpload.mdwn
index be53049d..d9de3315 100644
--- a/openpower/isa/pifpload.mdwn
+++ b/openpower/isa/pifpload.mdwn
@@ -2,11 +2,11 @@
 
 <!-- Section 4.6.1 Floating-point storage access instructions. P 140 - 143 -->
 
-# Load Floating-Point Single with Update
+# Load Floating-Point Single with Post-Update
 
 D-Form
 
-* lfsu FRT,D(RA)
+* lfsup FRT,D(RA)
 
 Pseudo-code:
 
@@ -31,11 +31,11 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Single with Update Indexed
+# Load Floating-Point Single with Post-Update Indexed
 
 X-Form
 
-* lfsux FRT,RA,RB
+* lfsupx FRT,RA,RB
 
 Pseudo-code:
 
@@ -60,11 +60,11 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Double with Update
+# Load Floating-Point Double with Post-Update
 
 D-Form
 
-* lfdu FRT,D(RA)
+* lfdup FRT,D(RA)
 
 Pseudo-code:
 
@@ -87,11 +87,11 @@ Special Registers Altered:
 
     None
 
-# Load Floating-Point Double with Update Indexed
+# Load Floating-Point Double with Post-Update Indexed
 
 X-Form
 
-* lfdux FRT,RA,RB
+* lfduxp FRT,RA,RB
 
 Pseudo-code:
 
-- 
2.30.2