From 34af17c0164f3138df094b144c7f74c2d1805444 Mon Sep 17 00:00:00 2001 From: Tom de Vries Date: Thu, 15 Oct 2020 11:37:43 +0200 Subject: [PATCH] [nvptx] Remove -m32 The nvptx port has an -m32 option, but it's not clear whether this was ever build/tested/used. Don't expose to user anymore. Tested on nvptx. gcc/ChangeLog: 2020-10-15 Tom de Vries PR target/97436 * config/nvptx/nvptx.opt (m32): Comment out. * doc/invoke.texi (NVPTX options): Remove -m32. gcc/testsuite/ChangeLog: 2020-10-15 Tom de Vries PR target/97436 * gcc.target/nvptx/atomic_fetch-3.c: Remove. --- gcc/config/nvptx/nvptx.opt | 8 ++++--- gcc/doc/invoke.texi | 7 +++--- .../gcc.target/nvptx/atomic_fetch-3.c | 24 ------------------- 3 files changed, 8 insertions(+), 31 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c diff --git a/gcc/config/nvptx/nvptx.opt b/gcc/config/nvptx/nvptx.opt index 38454222d42..045e3548f2d 100644 --- a/gcc/config/nvptx/nvptx.opt +++ b/gcc/config/nvptx/nvptx.opt @@ -17,9 +17,11 @@ ; along with GCC; see the file COPYING3. If not see ; . -m32 -Target Report RejectNegative InverseMask(ABI64) -Generate code for a 32-bit ABI. +; It's not clear whether this was ever build/tested/used, so this is no longer +; exposed to the user. +;m32 +;Target Report RejectNegative InverseMask(ABI64) +;Generate code for a 32-bit ABI. m64 Target Report RejectNegative Mask(ABI64) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 289d81614b2..631a119181c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1109,7 +1109,7 @@ Objective-C and Objective-C++ Dialects}. -march=@var{arch} -mbmx -mno-bmx -mcdx -mno-cdx} @emph{Nvidia PTX Options} -@gccoptlist{-m32 -m64 -mmainkernel -moptimize} +@gccoptlist{-m64 -mmainkernel -moptimize} @emph{OpenRISC Options} @gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol @@ -25614,11 +25614,10 @@ These options are defined for Nvidia PTX: @table @gcctabopt -@item -m32 @itemx -m64 -@opindex m32 @opindex m64 -Generate code for 32-bit or 64-bit ABI. +Ignored, but preserved for backward compatibility. Only 64-bit ABI is +supported. @item -misa=@var{ISA-string} @opindex march diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c deleted file mode 100644 index 36a83ebba9b..00000000000 --- a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-3.c +++ /dev/null @@ -1,24 +0,0 @@ -/* Test the nvptx atomic instructions for __atomic_fetch_OP for - SImode arguments. */ - -/* { dg-do compile } */ -/* { dg-options "-O2 -m32" } */ - -int -main() -{ - unsigned long a = ~0; - unsigned b = 0xa; - - __atomic_fetch_add (&a, b, 0); - __atomic_fetch_and (&a, b, 0); - __atomic_fetch_or (&a, b, 0); - __atomic_fetch_xor (&a, b, 0); - - return a; -} - -/* { dg-final { scan-assembler "atom.add.u32" } } */ -/* { dg-final { scan-assembler "atom.b32.and" } } */ -/* { dg-final { scan-assembler "atom.b32.or" } } */ -/* { dg-final { scan-assembler "atom.b32.xor" } } */ -- 2.30.2