From 34c3f6a27f70d9a45c754830de7cbe025d172487 Mon Sep 17 00:00:00 2001
From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Fri, 24 Mar 2017 14:25:57 -0700
Subject: [PATCH] genxml: Replace "[N]" with "N"

Reviewed-by: Chad Versace <chadversary@chromium.org>
---
 src/intel/genxml/gen6.xml  |  6 +++---
 src/intel/genxml/gen7.xml  | 12 ++++++------
 src/intel/genxml/gen75.xml | 12 ++++++------
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index d77d158e927..8eef7bf739a 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1413,9 +1413,9 @@
     <field name="Depth Buffer Clear" start="158" end="158" type="bool"/>
     <field name="Depth Buffer Resolve Enable" start="156" end="156" type="bool"/>
     <field name="Hierarchical Depth Buffer Resolve Enable" start="155" end="155" type="bool"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="144" end="150" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="136" end="142" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="128" end="134" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 0" start="144" end="150" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 1" start="136" end="142" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 2" start="128" end="134" type="uint"/>
     <field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
     <field name="Legacy Diamond Line Rasterization" start="183" end="183" type="bool"/>
     <field name="Pixel Shader Kills Pixel" start="182" end="182" type="bool"/>
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 40927efcea9..ee7877acb92 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1312,7 +1312,7 @@
     <field name="3D Command Opcode" start="24" end="26" type="uint" default="0"/>
     <field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="32"/>
     <field name="DWord Length" start="0" end="7" type="uint" default="6"/>
-    <field name="Kernel Start Pointer[0]" start="38" end="63" type="offset"/>
+    <field name="Kernel Start Pointer 0" start="38" end="63" type="offset"/>
     <field name="Single Program Flow" start="95" end="95" type="bool"/>
     <field name="Vector Mask Enable" start="94" end="94" type="bool"/>
     <field name="Sampler Count" start="91" end="93" type="uint"/>
@@ -1351,11 +1351,11 @@
     <field name="32 Pixel Dispatch Enable" start="130" end="130" type="bool"/>
     <field name="16 Pixel Dispatch Enable" start="129" end="129" type="bool"/>
     <field name="8 Pixel Dispatch Enable" start="128" end="128" type="bool"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="176" end="182" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="168" end="174" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="160" end="166" type="uint"/>
-    <field name="Kernel Start Pointer[1]" start="198" end="223" type="offset"/>
-    <field name="Kernel Start Pointer[2]" start="230" end="255" type="offset"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 0" start="176" end="182" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 1" start="168" end="174" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 2" start="160" end="166" type="uint"/>
+    <field name="Kernel Start Pointer 1" start="198" end="223" type="offset"/>
+    <field name="Kernel Start Pointer 2" start="230" end="255" type="offset"/>
   </instruction>
 
   <instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2">
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 7b5c2af2de1..094095e1d50 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1538,7 +1538,7 @@
     <field name="3D Command Opcode" start="24" end="26" type="uint" default="0"/>
     <field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="32"/>
     <field name="DWord Length" start="0" end="7" type="uint" default="6"/>
-    <field name="Kernel Start Pointer[0]" start="38" end="63" type="offset"/>
+    <field name="Kernel Start Pointer 0" start="38" end="63" type="offset"/>
     <field name="Single Program Flow" start="95" end="95" type="bool"/>
     <field name="Vector Mask Enable" start="94" end="94" type="bool"/>
     <field name="Sampler Count" start="91" end="93" type="uint"/>
@@ -1582,11 +1582,11 @@
     <field name="32 Pixel Dispatch Enable" start="130" end="130" type="bool"/>
     <field name="16 Pixel Dispatch Enable" start="129" end="129" type="bool"/>
     <field name="8 Pixel Dispatch Enable" start="128" end="128" type="bool"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [0]" start="176" end="182" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [1]" start="168" end="174" type="uint"/>
-    <field name="Dispatch GRF Start Register For Constant/Setup Data [2]" start="160" end="166" type="uint"/>
-    <field name="Kernel Start Pointer[1]" start="198" end="223" type="offset"/>
-    <field name="Kernel Start Pointer[2]" start="230" end="255" type="offset"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 0" start="176" end="182" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 1" start="168" end="174" type="uint"/>
+    <field name="Dispatch GRF Start Register For Constant/Setup Data 2" start="160" end="166" type="uint"/>
+    <field name="Kernel Start Pointer 1" start="198" end="223" type="offset"/>
+    <field name="Kernel Start Pointer 2" start="230" end="255" type="offset"/>
   </instruction>
 
   <instruction name="3DSTATE_PUSH_CONSTANT_ALLOC_DS" bias="2" length="2">
-- 
2.30.2