From 34ce532e6451c08faebc9a07c0c668d61fede4b5 Mon Sep 17 00:00:00 2001 From: Kevin Buettner Date: Sat, 13 Mar 2004 01:13:04 +0000 Subject: [PATCH] * frv-tdep.c, frv-tdep.h (first_gpr_regnum, sp_regnum, fp_regnum) (struct_return_regnum, last_gpr_regnum, first_fpr_regnum) (last_fpr_regnum, pc_regnum, first_spr_regnum, psr_regnum, ccr_regnum) (cccr_regnum, fdpic_loadmap_exec_regnum, fdpic_loadmap_interp_regnum) (tbr_regnum, brr_regnum, dbar0_regnum, dbar1_regnum, dbar2_regnum) (dbar3_regnum, lr_regnum, lcr_regnum, iacc0h_regnum, iacc0l_regnum) (last_spr_regnum, frv_num_regs, first_pseudo_regnum, iacc0_regnum) (last_pseudo_regnum, frv_num_pseudo_regs): Move constant (enum) definitions from frv-tdep.c to frv-tdep.h. --- gdb/ChangeLog | 12 ++++++++++++ gdb/frv-tdep.c | 52 -------------------------------------------------- gdb/frv-tdep.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+), 52 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6c79e8a121e..8627e404a7e 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,15 @@ +2004-03-12 Kevin Buettner + + * frv-tdep.c, frv-tdep.h (first_gpr_regnum, sp_regnum, fp_regnum) + (struct_return_regnum, last_gpr_regnum, first_fpr_regnum) + (last_fpr_regnum, pc_regnum, first_spr_regnum, psr_regnum, ccr_regnum) + (cccr_regnum, fdpic_loadmap_exec_regnum, fdpic_loadmap_interp_regnum) + (tbr_regnum, brr_regnum, dbar0_regnum, dbar1_regnum, dbar2_regnum) + (dbar3_regnum, lr_regnum, lcr_regnum, iacc0h_regnum, iacc0l_regnum) + (last_spr_regnum, frv_num_regs, first_pseudo_regnum, iacc0_regnum) + (last_pseudo_regnum, frv_num_pseudo_regs): Move constant (enum) + definitions from frv-tdep.c to frv-tdep.h. + 2004-03-12 Kevin Buettner Add shared library support for FR-V FDPIC ABI: diff --git a/gdb/frv-tdep.c b/gdb/frv-tdep.c index 6020b389144..6fd82f9406e 100644 --- a/gdb/frv-tdep.c +++ b/gdb/frv-tdep.c @@ -48,58 +48,6 @@ static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc; static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address; static gdbarch_skip_prologue_ftype frv_skip_prologue; -/* Register numbers. The order in which these appear define the - remote protocol, so take care in changing them. */ -enum { - /* Register numbers 0 -- 63 are always reserved for general-purpose - registers. The chip at hand may have less. */ - first_gpr_regnum = 0, - sp_regnum = 1, - fp_regnum = 2, - struct_return_regnum = 3, - last_gpr_regnum = 63, - - /* Register numbers 64 -- 127 are always reserved for floating-point - registers. The chip at hand may have less. */ - first_fpr_regnum = 64, - last_fpr_regnum = 127, - - /* The PC register. */ - pc_regnum = 128, - - /* Register numbers 129 on up are always reserved for special-purpose - registers. */ - first_spr_regnum = 129, - psr_regnum = 129, - ccr_regnum = 130, - cccr_regnum = 131, - fdpic_loadmap_exec_regnum = 132, - fdpic_loadmap_interp_regnum = 133, - tbr_regnum = 135, - brr_regnum = 136, - dbar0_regnum = 137, - dbar1_regnum = 138, - dbar2_regnum = 139, - dbar3_regnum = 140, - lr_regnum = 145, - lcr_regnum = 146, - iacc0h_regnum = 147, - iacc0l_regnum = 148, - last_spr_regnum = 148, - - /* The total number of registers we know exist. */ - frv_num_regs = last_spr_regnum + 1, - - /* Pseudo registers */ - first_pseudo_regnum = frv_num_regs, - - /* iacc0 - the 64-bit concatenation of iacc0h and iacc0l. */ - iacc0_regnum = first_pseudo_regnum + 0, - - last_pseudo_regnum = iacc0_regnum, - frv_num_pseudo_regs = last_pseudo_regnum - first_pseudo_regnum + 1, -}; - static LONGEST frv_call_dummy_words[] = {0}; diff --git a/gdb/frv-tdep.h b/gdb/frv-tdep.h index 5d95aa58022..691d7a547cd 100644 --- a/gdb/frv-tdep.h +++ b/gdb/frv-tdep.h @@ -25,6 +25,58 @@ enum frv_abi FRV_ABI_FDPIC }; +/* Register numbers. The order in which these appear define the + remote protocol, so take care in changing them. */ +enum { + /* Register numbers 0 -- 63 are always reserved for general-purpose + registers. The chip at hand may have less. */ + first_gpr_regnum = 0, + sp_regnum = 1, + fp_regnum = 2, + struct_return_regnum = 3, + last_gpr_regnum = 63, + + /* Register numbers 64 -- 127 are always reserved for floating-point + registers. The chip at hand may have less. */ + first_fpr_regnum = 64, + last_fpr_regnum = 127, + + /* The PC register. */ + pc_regnum = 128, + + /* Register numbers 129 on up are always reserved for special-purpose + registers. */ + first_spr_regnum = 129, + psr_regnum = 129, + ccr_regnum = 130, + cccr_regnum = 131, + fdpic_loadmap_exec_regnum = 132, + fdpic_loadmap_interp_regnum = 133, + tbr_regnum = 135, + brr_regnum = 136, + dbar0_regnum = 137, + dbar1_regnum = 138, + dbar2_regnum = 139, + dbar3_regnum = 140, + lr_regnum = 145, + lcr_regnum = 146, + iacc0h_regnum = 147, + iacc0l_regnum = 148, + last_spr_regnum = 148, + + /* The total number of registers we know exist. */ + frv_num_regs = last_spr_regnum + 1, + + /* Pseudo registers */ + first_pseudo_regnum = frv_num_regs, + + /* iacc0 - the 64-bit concatenation of iacc0h and iacc0l. */ + iacc0_regnum = first_pseudo_regnum + 0, + + last_pseudo_regnum = iacc0_regnum, + frv_num_pseudo_regs = last_pseudo_regnum - first_pseudo_regnum + 1, +}; + /* Return the FR-V ABI associated with GDBARCH. */ enum frv_abi frv_abi (struct gdbarch *gdbarch); -- 2.30.2