From 34dc6ed2a59040f04648eadbffeb1522587d00f3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 23 Jul 2019 17:46:38 -0400 Subject: [PATCH] radeonsi/gfx10: disable DCC image stores Uncompressed image stores are usually faster. Also, the driver didn't set WRITE_COMPRESS_ENABLE, so I don't know what the hw did for image stores. --- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 6d95cd7e891..09442be1350 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -739,7 +739,7 @@ static void si_set_shader_image_desc(struct si_context *ctx, assert(fmask_desc || tex->surface.fmask_size == 0); if (uses_dcc && !skip_decompress && - ((ctx->chip_class <= GFX9 && view->access & PIPE_IMAGE_ACCESS_WRITE) || + (view->access & PIPE_IMAGE_ACCESS_WRITE || !vi_dcc_formats_compatible(screen, res->b.b.format, view->format))) { /* If DCC can't be disabled, at least decompress it. * The decompression is relatively cheap if the surface diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c index 2707d5fc891..6181332ec01 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c @@ -196,8 +196,7 @@ LLVMValueRef si_load_image_desc(struct si_shader_context *ctx, else rsrc = ac_build_load_to_sgpr(&ctx->ac, list, index); - if (ctx->ac.chip_class <= GFX9 && - desc_type == AC_DESC_IMAGE && uses_store) + if (desc_type == AC_DESC_IMAGE && uses_store) rsrc = force_dcc_off(ctx, rsrc); return rsrc; } -- 2.30.2