From 355a6687a510caed1c822f9e8dc9a1abc6b16d9b Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Tue, 11 Apr 2023 21:27:24 +0300
Subject: [PATCH] ppc/svp64: support maddedu instruction

---
 gas/testsuite/gas/ppc/maddedu.d | 12 ++++++++++++
 gas/testsuite/gas/ppc/maddedu.s |  4 ++++
 gas/testsuite/gas/ppc/ppc.exp   |  1 +
 opcodes/ppc-opc.c               |  1 +
 4 files changed, 18 insertions(+)
 create mode 100644 gas/testsuite/gas/ppc/maddedu.d
 create mode 100644 gas/testsuite/gas/ppc/maddedu.s

diff --git a/gas/testsuite/gas/ppc/maddedu.d b/gas/testsuite/gas/ppc/maddedu.d
new file mode 100644
index 00000000000..2cdc221f45f
--- /dev/null
+++ b/gas/testsuite/gas/ppc/maddedu.d
@@ -0,0 +1,12 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*:\s+(13 e0 00 32|32 00 e0 13)\s+maddedu\sr31,r0,r0,r0
+.*:\s+(10 1f 00 32|32 00 1f 10)\s+maddedu\sr0,r31,r0,r0
+.*:\s+(10 00 f8 32|32 f8 00 10)\s+maddedu\sr0,r0,r31,r0
+.*:\s+(10 00 07 f2|f2 07 00 10)\s+maddedu\sr0,r0,r0,r31
diff --git a/gas/testsuite/gas/ppc/maddedu.s b/gas/testsuite/gas/ppc/maddedu.s
new file mode 100644
index 00000000000..59f89f0cec0
--- /dev/null
+++ b/gas/testsuite/gas/ppc/maddedu.s
@@ -0,0 +1,4 @@
+maddedu 31,0,0,0
+maddedu 0,31,0,0
+maddedu 0,0,31,0
+maddedu 0,0,0,31
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index e9068422d1a..b1fc7fcb5ce 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -169,3 +169,4 @@ run_dump_test "cprop"
 run_dump_test "absd"
 run_dump_test "bmask"
 run_dump_test "fptrans"
+run_dump_test "maddedu"
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 6490f891276..bf7ce6a117b 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -5246,6 +5246,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"maddhdu",	VXA(4,	49),	VXA_MASK,    POWER9,	0,		{RT, RA, RB, RC}},
 {"ps_mul",	A  (4,	25,0),	AFRB_MASK,   PPCPS,	0,		{FRT, FRA, FRC}},
 {"ps_mul.",	A  (4,	25,1),	AFRB_MASK,   PPCPS,	0,		{FRT, FRA, FRC}},
+{"maddedu",	VXA(4,	50),	VXA_MASK,    SVP64,	PPCVLE,		{RT, RA, RB, RC}},
 {"maddld",	VXA(4,	51),	VXA_MASK,    POWER9,	0,		{RT, RA, RB, RC}},
 {"ps_rsqrte",	A  (4,	26,0), AFRAFRC_MASK, PPCPS,	0,		{FRT, FRB}},
 {"ps_rsqrte.",	A  (4,	26,1), AFRAFRC_MASK, PPCPS,	0,		{FRT, FRB}},
-- 
2.30.2