From 35a54ad02f977a11b119d1ed13a3ce4d78a1599b Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 17 Sep 2013 11:23:59 -0700 Subject: [PATCH] i965: Fix off by one errors in texture buffer size calculations. The value that's split into width/height/depth needs to be the size of the buffer minus one. This makes it consistent with the constant buffer and shader time SURFACE_STATE setup code. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 52973d6da47..287a0346c3a 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -228,7 +228,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, *surf_offset + 4, bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); - int w = intel_obj->Base.Size / texel_size; + int w = (intel_obj->Base.Size / texel_size) - 1; surf[2] = ((w & 0x7f) << BRW_SURFACE_WIDTH_SHIFT | ((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT); surf[3] = (((w >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT | diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 37e3174c19b..c38843f25d5 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -260,7 +260,7 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, I915_GEM_DOMAIN_SAMPLER, 0); int texel_size = _mesa_get_format_bytes(format); - int w = intel_obj->Base.Size / texel_size; + int w = (intel_obj->Base.Size / texel_size) - 1; /* note that these differ from GEN6 */ surf[2] = SET_FIELD(w & 0x7f, GEN7_SURFACE_WIDTH) | /* bits 6:0 of size */ -- 2.30.2