From 36bb201dd9572f71c74d0987d8f42b19a6feaa9c Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 20 Apr 2020 20:56:38 -0700 Subject: [PATCH] techmap: sort celltypeMap as it determines techmap order --- passes/techmap/techmap.cc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index 16bc9c803..8a8756757 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -1313,11 +1313,13 @@ struct TechmapPass : public Pass { celltypeMap[RTLIL::escape_id(q)].insert(module->name); free(p); } else { - std::string module_name = module->name.begins_with("\\$") ? + IdString module_name = module->name.begins_with("\\$") ? module->name.substr(1) : module->name.str(); celltypeMap[module_name].insert(module->name); } } + for (auto &i : celltypeMap) + i.second.sort(RTLIL::sort_by_id_str()); for (auto module : design->modules()) worker.module_queue.insert(module); @@ -1389,6 +1391,8 @@ struct FlattenPass : public Pass { dict> celltypeMap; for (auto module : design->modules()) celltypeMap[module->name].insert(module->name); + for (auto &i : celltypeMap) + i.second.sort(RTLIL::sort_by_id_str()); RTLIL::Module *top_mod = nullptr; if (design->full_selection()) -- 2.30.2