From 36e5274a2b01ee7c65378e44bb2277761a4cca86 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 17 Jan 2020 12:45:23 +0100 Subject: [PATCH] SoCSDRAM: set default max_sdram_size to 1GB (maximum we can map with current mem_map) --- litex/soc/integration/soc_sdram.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/litex/soc/integration/soc_sdram.py b/litex/soc/integration/soc_sdram.py index 8c66b39b..47bd64bd 100644 --- a/litex/soc/integration/soc_sdram.py +++ b/litex/soc/integration/soc_sdram.py @@ -4,6 +4,7 @@ # License: BSD from math import log2 +import inspect from migen import * from migen.genlib.record import * @@ -138,8 +139,8 @@ def soc_sdram_args(parser): help="Minimum L2 cache datawidth (default=128)") # SDRAM - parser.add_argument("--max-sdram-size", default=None, - help="Maximum SDRAM size mapped to the SoC (default=None))") + parser.add_argument("--max-sdram-size", default=0x40000000, + help="Maximum SDRAM size mapped to the SoC (default=1GB))") def soc_sdram_argdict(args): r = soc_core_argdict(args) -- 2.30.2