From 3723ff52237194995d4f9f9fb5d66fb80110889e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 9 May 2014 15:55:59 +1000 Subject: [PATCH] nvc0: move nvc0 lowering pass class definitions into header Signed-off-by: Ben Skeggs Reviewed-by: Ilia Mirkin --- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 105 +------------- .../nouveau/codegen/nv50_ir_lowering_nvc0.h | 134 ++++++++++++++++++ .../nouveau/codegen/nv50_ir_target_nvc0.h | 3 +- 3 files changed, 136 insertions(+), 106 deletions(-) create mode 100644 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 0b439ddf372..dfaa28ff740 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -24,6 +24,7 @@ #include "codegen/nv50_ir_build_util.h" #include "codegen/nv50_ir_target_nvc0.h" +#include "codegen/nv50_ir_lowering_nvc0.h" #include @@ -39,20 +40,6 @@ namespace nv50_ir { ((QOP_##q << 6) | (QOP_##r << 4) | \ (QOP_##s << 2) | (QOP_##t << 0)) -class NVC0LegalizeSSA : public Pass -{ -private: - virtual bool visit(BasicBlock *); - virtual bool visit(Function *); - - // we want to insert calls to the builtin library only after optimization - void handleDIV(Instruction *); // integer division, modulus - void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt - -private: - BuildUtil bld; -}; - void NVC0LegalizeSSA::handleDIV(Instruction *i) { @@ -118,49 +105,6 @@ NVC0LegalizeSSA::visit(BasicBlock *bb) return true; } -class NVC0LegalizePostRA : public Pass -{ -public: - NVC0LegalizePostRA(const Program *); - -private: - virtual bool visit(Function *); - virtual bool visit(BasicBlock *); - - void replaceZero(Instruction *); - bool tryReplaceContWithBra(BasicBlock *); - void propagateJoin(BasicBlock *); - - struct TexUse - { - TexUse(Instruction *use, const Instruction *tex) - : insn(use), tex(tex), level(-1) { } - Instruction *insn; - const Instruction *tex; // or split / mov - int level; - }; - struct Limits - { - Limits() { } - Limits(int min, int max) : min(min), max(max) { } - int min, max; - }; - bool insertTextureBarriers(Function *); - inline bool insnDominatedBy(const Instruction *, const Instruction *) const; - void findFirstUses(const Instruction *tex, const Instruction *def, - std::list&); - void findOverwritingDefs(const Instruction *tex, Instruction *insn, - const BasicBlock *term, - std::list&); - void addTexUse(std::list&, Instruction *, const Instruction *); - const Instruction *recurseDef(const Instruction *); - -private: - LValue *rZero; - LValue *carry; - const bool needTexBar; -}; - NVC0LegalizePostRA::NVC0LegalizePostRA(const Program *prog) : rZero(NULL), carry(NULL), @@ -576,53 +520,6 @@ NVC0LegalizePostRA::visit(BasicBlock *bb) return true; } -class NVC0LoweringPass : public Pass -{ -public: - NVC0LoweringPass(Program *); - -private: - virtual bool visit(Function *); - virtual bool visit(BasicBlock *); - virtual bool visit(Instruction *); - - bool handleRDSV(Instruction *); - bool handleWRSV(Instruction *); - bool handleEXPORT(Instruction *); - bool handleOUT(Instruction *); - bool handleDIV(Instruction *); - bool handleMOD(Instruction *); - bool handleSQRT(Instruction *); - bool handlePOW(Instruction *); - bool handleTEX(TexInstruction *); - bool handleTXD(TexInstruction *); - bool handleTXQ(TexInstruction *); - bool handleManualTXD(TexInstruction *); - bool handleTXLQ(TexInstruction *); - bool handleATOM(Instruction *); - bool handleCasExch(Instruction *, bool needCctl); - void handleSurfaceOpNVE4(TexInstruction *); - - void checkPredicate(Instruction *); - - void readTessCoord(LValue *dst, int c); - - Value *loadResInfo32(Value *ptr, uint32_t off); - Value *loadMsInfo32(Value *ptr, uint32_t off); - Value *loadTexHandle(Value *ptr, unsigned int slot); - - void adjustCoordinatesMS(TexInstruction *); - void processSurfaceCoordsNVE4(TexInstruction *); - -private: - const Target *const targ; - - BuildUtil bld; - - Symbol *gMemBase; - LValue *gpEmitAddress; -}; - NVC0LoweringPass::NVC0LoweringPass(Program *prog) : targ(prog->getTarget()) { bld.setProgram(prog); diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h new file mode 100644 index 00000000000..b68c2d09146 --- /dev/null +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h @@ -0,0 +1,134 @@ +/* + * Copyright 2011 Christoph Bumiller + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "codegen/nv50_ir.h" +#include "codegen/nv50_ir_build_util.h" + +namespace nv50_ir { + +class NVC0LegalizeSSA : public Pass +{ +private: + virtual bool visit(BasicBlock *); + virtual bool visit(Function *); + + // we want to insert calls to the builtin library only after optimization + void handleDIV(Instruction *); // integer division, modulus + void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt + +private: + BuildUtil bld; +}; + +class NVC0LegalizePostRA : public Pass +{ +public: + NVC0LegalizePostRA(const Program *); + +private: + virtual bool visit(Function *); + virtual bool visit(BasicBlock *); + + void replaceZero(Instruction *); + bool tryReplaceContWithBra(BasicBlock *); + void propagateJoin(BasicBlock *); + + struct TexUse + { + TexUse(Instruction *use, const Instruction *tex) + : insn(use), tex(tex), level(-1) { } + Instruction *insn; + const Instruction *tex; // or split / mov + int level; + }; + struct Limits + { + Limits() { } + Limits(int min, int max) : min(min), max(max) { } + int min, max; + }; + bool insertTextureBarriers(Function *); + inline bool insnDominatedBy(const Instruction *, const Instruction *) const; + void findFirstUses(const Instruction *tex, const Instruction *def, + std::list&); + void findOverwritingDefs(const Instruction *tex, Instruction *insn, + const BasicBlock *term, + std::list&); + void addTexUse(std::list&, Instruction *, const Instruction *); + const Instruction *recurseDef(const Instruction *); + +private: + LValue *rZero; + LValue *carry; + const bool needTexBar; +}; + +class NVC0LoweringPass : public Pass +{ +public: + NVC0LoweringPass(Program *); + +protected: + bool handleRDSV(Instruction *); + bool handleWRSV(Instruction *); + bool handleEXPORT(Instruction *); + bool handleOUT(Instruction *); + bool handleDIV(Instruction *); + bool handleMOD(Instruction *); + bool handleSQRT(Instruction *); + bool handlePOW(Instruction *); + bool handleTEX(TexInstruction *); + bool handleTXD(TexInstruction *); + bool handleTXQ(TexInstruction *); + bool handleManualTXD(TexInstruction *); + bool handleTXLQ(TexInstruction *); + bool handleATOM(Instruction *); + bool handleCasExch(Instruction *, bool needCctl); + void handleSurfaceOpNVE4(TexInstruction *); + + void checkPredicate(Instruction *); + +private: + virtual bool visit(Function *); + virtual bool visit(BasicBlock *); + virtual bool visit(Instruction *); + + void readTessCoord(LValue *dst, int c); + + Value *loadResInfo32(Value *ptr, uint32_t off); + Value *loadMsInfo32(Value *ptr, uint32_t off); + Value *loadTexHandle(Value *ptr, unsigned int slot); + + void adjustCoordinatesMS(TexInstruction *); + void processSurfaceCoordsNVE4(TexInstruction *); + +protected: + BuildUtil bld; + +private: + const Target *const targ; + + Symbol *gMemBase; + LValue *gpEmitAddress; +}; + +} // namespace nv50_ir diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h index 7831af5069b..3c5c7480405 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h @@ -44,6 +44,7 @@ public: virtual bool runLegalizePass(Program *, CGStage stage) const; virtual void getBuiltinCode(const uint32_t **code, uint32_t *size) const; + virtual uint32_t getBuiltinOffset(int builtin) const; virtual bool insnCanLoad(const Instruction *insn, int s, const Instruction *ld) const; @@ -63,8 +64,6 @@ public: virtual uint32_t getSVAddress(DataFile shaderFile, const Symbol *sv) const; - uint32_t getBuiltinOffset(int builtin) const; - private: void initOpInfo(); }; -- 2.30.2