From 3797f4d4d4f683fdfb8e42fb00a91783cc278d8b Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Wed, 6 Apr 1994 08:46:56 -0400 Subject: [PATCH] Add define_split to simplify "(unsigned) x > 0xffffff". From-SVN: r6988 --- gcc/config/alpha/alpha.md | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index bf56286ddef..7f2999f9c68 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -2232,6 +2232,30 @@ operands[6] = gen_rtx (GET_CODE (operands[1]), VOIDmode, operands[4], const0_rtx); }") + +;; We can convert such things as "a > 0xffff" to "t = a & 0xffff; t != 0". +;; This eliminates one, and sometimes two, insns when the AND can be done +;; with a ZAP. +(define_split + [(set (match_operand:DI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(match_operand:DI 2 "register_operand" "") + (match_operand:DI 3 "const_int_operand" "")])) + (clobber (match_operand:DI 4 "register_operand" ""))] + "exact_log2 (INTVAL (operands[3]) + 1) >= 0 + && (GET_CODE (operands[1]) == GTU + || GET_CODE (operands[1]) == LEU + || ((GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == LE) + && extended_count (operands[2], DImode, 1) > 0))" + [(set (match_dup 4) (and:DI (match_dup 2) (match_dup 3))) + (set (match_dup 0) (match_dup 5))] + " +{ + operands[5] = gen_rtx (((GET_CODE (operands[1]) == GTU + || GET_CODE (operands[1]) == GE) + ? NE : LE), + DImode, operands[4], const0_rtx); +}") ;; Here are the CALL and unconditional branch insns. -- 2.30.2