From 37ff5d4f0d7e72c577eba61b3d2ada12fe4248cc Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 20 Sep 2020 15:39:47 +0100 Subject: [PATCH] still experimenting with async FF sync --- src/soc/experiment/test/async_sim.py | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/soc/experiment/test/async_sim.py b/src/soc/experiment/test/async_sim.py index 8ca20dc3..62ee0dff 100644 --- a/src/soc/experiment/test/async_sim.py +++ b/src/soc/experiment/test/async_sim.py @@ -12,7 +12,7 @@ class Domain1(Elaboratable): def __init__(self): self.tick = Signal() self.tick_clear_wait = Signal() - self.counter = Signal(8) + self.counter = Signal(64) self.rst = Signal() def elaborate(self, platform): @@ -33,7 +33,7 @@ class Domain1(Elaboratable): # simple "counter" thing class Domain2(Elaboratable): def __init__(self): - self.counter = Signal(8) + self.counter = Signal(64) self.rst = Signal() def elaborate(self, platform): @@ -64,7 +64,8 @@ class AsyncThing(Elaboratable): comb += core_sync.clk.eq(self.core_clk) # driven externally comb += core.rst.eq(ResetSignal()) - m.submodules += AsyncFFSynchronizer(self.core_tick, core.tick) + m.submodules += AsyncFFSynchronizer(self.core_tick, core.tick, + domain="coresync") return m @@ -86,11 +87,15 @@ def async_sim_clk(dut): yield Tick("sync") yield Tick("sync") yield Tick("sync") + yield Tick("sync") + yield Tick("sync") yield dut.core_clk.eq(0) yield Tick("sync") yield Tick("sync") yield Tick("sync") yield Tick("sync") + yield Tick("sync") + yield Tick("sync") counter = yield dut.core2.counter print ("async counter", counter) -- 2.30.2