From 38315079571512dc5b502d9522d7a8c3eaf2cc8f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 6 May 2010 17:41:22 -0700 Subject: [PATCH] ir_to_mesa: Add support for comparison operations. --- ir_to_mesa.cpp | 20 ++++++++++++++++++++ ir_to_mesa.h | 3 +++ mesa_codegen.brg | 13 +++++++++++++ 3 files changed, 36 insertions(+) diff --git a/ir_to_mesa.cpp b/ir_to_mesa.cpp index 1bdb61801c0..465a8e19164 100644 --- a/ir_to_mesa.cpp +++ b/ir_to_mesa.cpp @@ -360,6 +360,26 @@ ir_to_mesa_visitor::visit(ir_expression *ir) case ir_binop_div: this->result = this->create_tree(MB_TERM_div_vec4_vec4, ir, op[0], op[1]); break; + + case ir_binop_less: + this->result = this->create_tree(MB_TERM_slt_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_greater: + this->result = this->create_tree(MB_TERM_sgt_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_lequal: + this->result = this->create_tree(MB_TERM_sle_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_gequal: + this->result = this->create_tree(MB_TERM_sge_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_equal: + this->result = this->create_tree(MB_TERM_seq_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_nequal: + this->result = this->create_tree(MB_TERM_sne_vec4_vec4, ir, op[0], op[1]); + break; + case ir_binop_dot: if (ir->operands[0]->type == vec4_type) { assert(ir->operands[1]->type == vec4_type); diff --git a/ir_to_mesa.h b/ir_to_mesa.h index ee776bd55fe..ffa27dbd00f 100644 --- a/ir_to_mesa.h +++ b/ir_to_mesa.h @@ -161,6 +161,9 @@ ir_to_mesa_emit_op2_full(struct mbtree *tree, enum prog_opcode op, ir_to_mesa_src_reg src0, ir_to_mesa_src_reg src1); +ir_to_mesa_instruction * +ir_to_mesa_emit_simple_op2(struct mbtree *tree, enum prog_opcode op); + ir_to_mesa_instruction * ir_to_mesa_emit_op3(struct mbtree *tree, enum prog_opcode op, ir_to_mesa_dst_reg dst, diff --git a/mesa_codegen.brg b/mesa_codegen.brg index e52798bcf51..4e761343ae3 100644 --- a/mesa_codegen.brg +++ b/mesa_codegen.brg @@ -56,6 +56,12 @@ %term sub_vec4_vec4 %term mul_vec4_vec4 %term div_vec4_vec4 +%term slt_vec4_vec4 +%term sgt_vec4_vec4 +%term sle_vec4_vec4 +%term sge_vec4_vec4 +%term seq_vec4_vec4 +%term sne_vec4_vec4 %term dp4_vec4_vec4 %term dp3_vec4_vec4 %term dp2_vec4_vec4 @@ -171,6 +177,13 @@ vec4: div_vec4_vec4(vec4, vec4) 1 tree->left->src_reg); } +vec4: slt_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SLT); } +vec4: sgt_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SGT); } +vec4: sle_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SLE); } +vec4: sge_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SGE); } +vec4: sne_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SNE); } +vec4: seq_vec4_vec4(vec4, vec4) 1 { ir_to_mesa_emit_op2(tree, OPCODE_SEQ); } + vec4: sqrt_vec4(vec4) 1 { ir_to_mesa_emit_scalar_op1(tree, OPCODE_RSQ, -- 2.30.2