From 387e762476ff224ee40760910e73a3905a2c380a Mon Sep 17 00:00:00 2001 From: Faraz Shahbazker Date: Mon, 6 May 2019 09:29:20 -0700 Subject: [PATCH] Add macro expansions for ADD, SUB, DADD and DSUB for MIPS r6 Release 6 of the MIPS architecture does not have an ADDI instruction. ADD/SUB instructions with immediate operands can be expanded to load and immediate value and then perform the operation. gas/ * config/tc-mips.c (macro) : Add expansions for MIPS r6. * testsuite/gas/mips/add.s: Enable tests for R6. * testsuite/gas/mips/daddi.s: Annotate to test DADD for R6. * testsuite/gas/mips/mipsr6@add.d: Likewise. * gas/testsuite/gas/mips/mipsr6@dadd.d: New test. * gas/testsuite/gas/mips/mips.exp: Run the new test. opcodes/ * mips-opc.c (mips_opcodes): Enable ADD, SUB, DADD and DSUB macros for R6. --- gas/ChangeLog | 10 ++++++++++ gas/config/tc-mips.c | 20 ++++++++++++++------ gas/testsuite/gas/mips/add.s | 2 -- gas/testsuite/gas/mips/daddi.s | 3 ++- gas/testsuite/gas/mips/mips.exp | 1 + gas/testsuite/gas/mips/mipsr6@add.d | 15 ++++++++++++++- gas/testsuite/gas/mips/mipsr6@dadd.d | 21 +++++++++++++++++++++ opcodes/ChangeLog | 5 +++++ opcodes/mips-opc.c | 8 ++++---- 9 files changed, 71 insertions(+), 14 deletions(-) create mode 100644 gas/testsuite/gas/mips/mipsr6@dadd.d diff --git a/gas/ChangeLog b/gas/ChangeLog index 5307d23891b..c524feca4bf 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2019-05-10 Faraz Shahbazker + + * config/tc-mips.c (macro) : + Add expansions for MIPS r6. + * testsuite/gas/mips/add.s: Enable tests for R6. + * testsuite/gas/mips/daddi.s: Annotate to test DADD for R6. + * testsuite/gas/mips/mipsr6@add.d: Likewise. + * gas/testsuite/gas/mips/mipsr6@dadd.d: New test. + * gas/testsuite/gas/mips/mips.exp: Run the new test. + 2019-05-09 Matthew Malcomson * testsuite/gas/aarch64/sve2.d: Remove file format restriction. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 6a945e31568..05527d8084d 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -10350,7 +10350,10 @@ macro (struct mips_cl_insn *ip, char *str) case M_ADD_I: s = "addi"; s2 = "add"; - goto do_addi; + if (ISA_IS_R6 (mips_opts.isa)) + goto do_addi_i; + else + goto do_addi; case M_ADDU_I: s = "addiu"; s2 = "addu"; @@ -10359,10 +10362,11 @@ macro (struct mips_cl_insn *ip, char *str) dbl = 1; s = "daddi"; s2 = "dadd"; - if (!mips_opts.micromips) + if (!mips_opts.micromips && !ISA_IS_R6 (mips_opts.isa)) goto do_addi; if (imm_expr.X_add_number >= -0x200 - && imm_expr.X_add_number < 0x200) + && imm_expr.X_add_number < 0x200 + && !ISA_IS_R6 (mips_opts.isa)) { macro_build (NULL, s, "t,r,.", op[0], op[1], (int) imm_expr.X_add_number); @@ -13716,7 +13720,10 @@ macro (struct mips_cl_insn *ip, char *str) case M_SUB_I: s = "addi"; s2 = "sub"; - goto do_subi; + if (ISA_IS_R6 (mips_opts.isa)) + goto do_subi_i; + else + goto do_subi; case M_SUBU_I: s = "addiu"; s2 = "subu"; @@ -13725,10 +13732,11 @@ macro (struct mips_cl_insn *ip, char *str) dbl = 1; s = "daddi"; s2 = "dsub"; - if (!mips_opts.micromips) + if (!mips_opts.micromips && !ISA_IS_R6 (mips_opts.isa)) goto do_subi; if (imm_expr.X_add_number > -0x200 - && imm_expr.X_add_number <= 0x200) + && imm_expr.X_add_number <= 0x200 + && !ISA_IS_R6 (mips_opts.isa)) { macro_build (NULL, s, "t,r,.", op[0], op[1], (int) -imm_expr.X_add_number); diff --git a/gas/testsuite/gas/mips/add.s b/gas/testsuite/gas/mips/add.s index 5702d921a7c..d1c70edcf80 100644 --- a/gas/testsuite/gas/mips/add.s +++ b/gas/testsuite/gas/mips/add.s @@ -1,14 +1,12 @@ # Source file used to test the add macro. foo: - .ifndef r6 add $4,$4,0 add $4,$4,1 add $4,$4,0x8000 add $4,$4,-0x8000 add $4,$4,0x10000 add $4,$4,0x1a5a5 - .endif # addu is handled the same way add is; just confirm that it isn't # totally broken. diff --git a/gas/testsuite/gas/mips/daddi.s b/gas/testsuite/gas/mips/daddi.s index b06dbee7f60..b942a9fe185 100644 --- a/gas/testsuite/gas/mips/daddi.s +++ b/gas/testsuite/gas/mips/daddi.s @@ -5,7 +5,7 @@ .text text_label: - + .ifndef r6 daddi $3, $2, 511 daddi $5, $4, -512 @@ -17,6 +17,7 @@ text_label: daddi $9, $8, -513 daddi $11, $10, 32767 daddi $13, $12, -32768 + .endif # 16 bits accepted for standard MIPS code. .ifndef micromips diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 3e66fcf323e..4db66833d01 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1502,6 +1502,7 @@ if { [istarget mips*-*-vxworks*] } { [mips_arch_list_matching mips32] ] ] run_dump_test_arches "daddi" [mips_arch_list_matching mips3 \ !mips32r6] + run_dump_test_arches "dadd" [mips_arch_list_matching mips64r6] run_dump_test_arches "pref" [lsort -dictionary -unique [concat \ [mips_arch_list_matching mips4] \ [mips_arch_list_matching mips32] ] ] diff --git a/gas/testsuite/gas/mips/mipsr6@add.d b/gas/testsuite/gas/mips/mipsr6@add.d index 65a5214459f..fe329991e7c 100644 --- a/gas/testsuite/gas/mips/mipsr6@add.d +++ b/gas/testsuite/gas/mips/mipsr6@add.d @@ -8,5 +8,18 @@ .*: +file format .*mips.* Disassembly of section .text: -0+0000 <[^>]*> addiu a0,a0,1 +[0-9a-f]+ <[^>]*> li at,0 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> li at,1 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> li at,0x8000 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> li at,-32768 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> lui at,0x1 +[0-9a-f]+ <[^>]*> ori at,at,0xa5a5 +[0-9a-f]+ <[^>]*> add a0,a0,at +[0-9a-f]+ <[^>]*> addiu a0,a0,1 \.\.\. diff --git a/gas/testsuite/gas/mips/mipsr6@dadd.d b/gas/testsuite/gas/mips/mipsr6@dadd.d new file mode 100644 index 00000000000..0701f266981 --- /dev/null +++ b/gas/testsuite/gas/mips/mipsr6@dadd.d @@ -0,0 +1,21 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS DADD immediate expansion for R6 +#as: -32 +#source: daddi.s + +# Check MIPS DADD macro expansion with an immediate operand. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 34018000 li at,0x8000 +[0-9a-f]+ <[^>]*> 01c1782c dadd t7,t6,at +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 34217fff ori at,at,0x7fff +[0-9a-f]+ <[^>]*> 0201882c dadd s1,s0,at +[0-9a-f]+ <[^>]*> 34018200 li at,0x8200 +[0-9a-f]+ <[^>]*> 0241982c dadd s3,s2,at +[0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff +[0-9a-f]+ <[^>]*> 34217dff ori at,at,0x7dff +[0-9a-f]+ <[^>]*> 0281a82c dadd s5,s4,at + \.\.\. diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index aa78ea96d5a..ff72dba218e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2019-05-10 Faraz Shahbazker + + * mips-opc.c (mips_opcodes): Enable ADD, SUB, DADD and DSUB + macros for R6. + 2019-05-11 Alan Modra * ppc-dis.c (print_insn_powerpc) Don't skip optional operands diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 64b13c801f2..69b16be80f6 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -666,7 +666,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, RD_3|LM|SM|NODS, 0, 0, MC, 0 }, {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, 0, MC, 0 }, {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, -{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1, 0, I37 }, +{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1, 0, 0 }, {"add", "D,S,T", 0x45c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 }, {"add", "D,S,T", 0x4b40000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, LMMI, 0 }, {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, @@ -1015,7 +1015,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, 0, M3D, 0 }, {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3, 0, 0 }, {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, -{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3, 0, I69 }, +{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3, 0, 0 }, {"dadd", "D,S,T", 0x45e00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 }, {"dadd", "D,S,T", 0x4b60000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, LMMI, 0 }, {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_1|RD_2, 0, I3, 0, I69 }, @@ -1173,7 +1173,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dsrl", "D,S,T", 0x45a00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 }, {"dsrl", "D,S,T", 0x4b20000f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, LMMI, 0 }, {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, -{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, 0, I3, 0, I69 }, +{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, 0, I3, 0, 0 }, {"dsub", "D,S,T", 0x45e00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 }, {"dsub", "D,S,T", 0x4b60000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, LMMI, 0 }, {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, @@ -1955,7 +1955,7 @@ const struct mips_opcode mips_builtin_opcodes[] = /* ssnop is at the start of the table. */ {"standby", "", 0x42000021, 0xffffffff, 0, 0, V1, 0, 0 }, {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, -{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, 0, I1, 0, I37 }, +{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, 0, I1, 0, 0 }, {"sub", "D,S,T", 0x45c00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 }, {"sub", "D,S,T", 0x4b40000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, LMMI, 0 }, {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF }, -- 2.30.2