From 38c7a4504d3140bfee3151805661dea52b25934b Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Fri, 23 Aug 1996 19:12:05 +0000 Subject: [PATCH] * v850-opc.c (v850_operands): "not" is a two byte insn. --- opcodes/ChangeLog | 2 ++ opcodes/v850-opc.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a66d07a23be..4ddc4025cd3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,8 @@ start-sanitize-v850 Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) + * v850-opc.c (v850_operands): "not" is a two byte insn + * v850-opc.c (v850_opcodes): Correct bit pattern for setf. * v850-opc.c (v850_operands): D16 inserts at offset 16! diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 3d4973ece3e..2bb8c07d0a3 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -176,7 +176,7 @@ const struct v850_opcode v850_opcodes[] = { { "andi", OP(0x36), OP_MASK, IF6, 4 }, { "xor", OP(0x09), OP_MASK, IF1, 2 }, { "xori", OP(0x35), OP_MASK, IF6, 4 }, -{ "not", OP(0x01), OP_MASK, IF1, 4 }, +{ "not", OP(0x01), OP_MASK, IF1, 2 }, { "sar", OP(0x15), OP_MASK, {I5U, R2}, 2 }, { "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2}, 4 }, { "shl", OP(0x16), OP_MASK, {I5U, R2}, 2 }, -- 2.30.2