From 390875e69414e413076e9dad99dfab945f986eab Mon Sep 17 00:00:00 2001 From: Kugan Vivekanandarajah Date: Fri, 24 Jul 2015 01:43:22 +0000 Subject: [PATCH] reg_equal_test.c: New test. gcc/testsuite/ChangeLog: 2015-07-23 Kugan Vivekanandarajah * gcc.target/arm/reg_equal_test.c: New test. gcc/ChangeLog: 2015-07-23 Kugan Vivekanandarajah * config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to instruction. From-SVN: r226135 --- gcc/ChangeLog | 5 ++++ gcc/config/arm/arm.c | 14 ++++++++--- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/arm/reg_equal_test.c | 24 +++++++++++++++++++ 4 files changed, 44 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/reg_equal_test.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1d6fd3c7dff..211f82ba6f7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-07-23 Kugan Vivekanandarajah + + * config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to + instruction. + 2015-07-23 Kugan Vivekanandarajah * cse.c (cse_insn): Fix missing check for STRICT_LOW_PART and minor diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e1bc727c6a0..eeab8a8b5ae 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -17871,19 +17871,27 @@ output_mov_long_double_arm_from_arm (rtx *operands) void arm_emit_movpair (rtx dest, rtx src) { + rtx insn; + /* If the src is an immediate, simplify it. */ if (CONST_INT_P (src)) { HOST_WIDE_INT val = INTVAL (src); emit_set_insn (dest, GEN_INT (val & 0x0000ffff)); if ((val >> 16) & 0x0000ffff) - emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16), - GEN_INT (16)), - GEN_INT ((val >> 16) & 0x0000ffff)); + { + emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16), + GEN_INT (16)), + GEN_INT ((val >> 16) & 0x0000ffff)); + insn = get_last_insn (); + set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); + } return; } emit_set_insn (dest, gen_rtx_HIGH (SImode, src)); emit_set_insn (dest, gen_rtx_LO_SUM (SImode, dest, src)); + insn = get_last_insn (); + set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); } /* Output a move between double words. It must be REG<-MEM diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d8742d3dd77..81d09f6fffc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-07-23 Kugan Vivekanandarajah + + * gcc.target/arm/reg_equal_test.c: New test. + 2015-07-23 Jeff Law PR lto/66752 diff --git a/gcc/testsuite/gcc.target/arm/reg_equal_test.c b/gcc/testsuite/gcc.target/arm/reg_equal_test.c new file mode 100644 index 00000000000..58fa9dd9b94 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/reg_equal_test.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -fdump-rtl-expand" } */ + +extern void abort (void); +unsigned int a = 1; + +int +main (void) +{ + unsigned int b, c, d; + + if (sizeof (int) != 4 || (int) 0xc7d24b5e > 0) + return 0; + + c = 0xc7d24b5e; + d = a | -2; + b = (d == 0) ? c : (c % d); + if (b != c) + abort (); + + return 0; +} + +/* { dg-final { scan-rtl-dump "expr_list:REG_EQUAL \\(const_int -942519458" "expand" } } */ -- 2.30.2