From 395a32717df494353703f3581edcd3ba380f16d6 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 21 Nov 2013 14:07:12 -0800 Subject: [PATCH] i965: Introduce an UNKNOWN_RING state. When we first create a batch buffer, it's empty. We don't actually know what ring it will be targeted at until the first BEGIN_BATCH or BEGIN_BATCH_BLT macro. Previously, one could determine the state of the batch by checking brw->batch.ring (blit vs. render) and brw->batch.used != 0 (known vs. unknown). This should be functionally equivalent, but the tri-state enum is a bit clearer. v2: Catch three explicit require_space callers (thanks to Carl and Eric). v3: Split the boolean -> enum change from the UNKNOWN_RING change. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/intel_batchbuffer.c | 8 ++++++++ src/mesa/drivers/dri/i965/intel_batchbuffer.h | 11 ++++++++--- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 7576a22c955..fe9e3a8fa08 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -862,6 +862,7 @@ struct intel_sync_object { }; enum brw_gpu_ring { + UNKNOWN_RING, RENDER_RING, BLT_RING, }; diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 672bc021486..d8eb3fc8837 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -100,6 +100,11 @@ intel_batchbuffer_reset(struct brw_context *brw) brw->batch.state_batch_offset = brw->batch.bo->size; brw->batch.used = 0; brw->batch.needs_sol_reset = false; + + /* We don't know what ring the new batch will be sent to until we see the + * first BEGIN_BATCH or BEGIN_BATCH_BLT. Mark it as unknown. + */ + brw->batch.ring = UNKNOWN_RING; } void @@ -116,6 +121,8 @@ intel_batchbuffer_reset_to_saved(struct brw_context *brw) drm_intel_gem_bo_clear_relocs(brw->batch.bo, brw->batch.saved.reloc_count); brw->batch.used = brw->batch.saved.used; + if (brw->batch.used == 0) + brw->batch.ring = UNKNOWN_RING; /* Cached batch state is dead, since we just cleared some unknown part of the * batchbuffer. Assume that the caller resets any other state necessary. @@ -429,6 +436,7 @@ intel_batchbuffer_cached_advance(struct brw_context *brw) brw->batch.cached_items = item; } brw->batch.used = brw->batch.emit; + assert(brw->batch.used > 0); return; } diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index 40b0a296a96..f7638bcb3d8 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -93,6 +93,7 @@ intel_batchbuffer_emit_dword(struct brw_context *brw, GLuint dword) assert(intel_batchbuffer_space(brw) >= 4); #endif brw->batch.map[brw->batch.used++] = dword; + assert(brw->batch.ring != UNKNOWN_RING); } static INLINE void @@ -106,17 +107,21 @@ intel_batchbuffer_require_space(struct brw_context *brw, GLuint sz, enum brw_gpu_ring ring) { /* If we're switching rings, implicitly flush the batch. */ - if (unlikely(ring != brw->batch.ring) && brw->batch.used && brw->gen >= 6) { + if (unlikely(ring != brw->batch.ring) && brw->batch.ring != UNKNOWN_RING && + brw->gen >= 6) { intel_batchbuffer_flush(brw); } - brw->batch.ring = ring; - #ifdef DEBUG assert(sz < BATCH_SZ - BATCH_RESERVED); #endif if (intel_batchbuffer_space(brw) < sz) intel_batchbuffer_flush(brw); + + /* The intel_batchbuffer_flush() calls above might have changed + * brw->batch.ring to UNKNOWN_RING, so we need to set it here at the end. + */ + brw->batch.ring = ring; } static INLINE void -- 2.30.2