From 396a3fb6aff530cddb745188c48910e5f41e5096 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 9 May 2021 15:45:17 +0100 Subject: [PATCH] add MMU bugtracker link --- src/soc/fu/mmu/fsm.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/fu/mmu/fsm.py b/src/soc/fu/mmu/fsm.py index a519cca7..f7541b8c 100644 --- a/src/soc/fu/mmu/fsm.py +++ b/src/soc/fu/mmu/fsm.py @@ -2,6 +2,7 @@ Based on microwatt mmu.vhdl * https://bugs.libre-soc.org/show_bug.cgi?id=491 +* https://bugs.libre-soc.org/show_bug.cgi?id=450 """ from nmigen import Elaboratable, Module, Signal, Shape, unsigned, Cat, Mux -- 2.30.2