From 39e0911f454a31bb84c7131acb6a616761102ba2 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Sat, 30 Jul 1994 18:09:27 -0400 Subject: [PATCH] ({store,extract}_bit_field): Don't use bitfield insn if OP0 is register and bitfield spans it. From-SVN: r7837 --- gcc/expmed.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/gcc/expmed.c b/gcc/expmed.c index 98019eeb2ed..46e16bef34f 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -369,7 +369,10 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size) && !(bitsize == 1 && GET_CODE (value) == CONST_INT) /* Ensure insv's size is wide enough for this field. */ && (GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_insv][3]) - >= bitsize)) + >= bitsize) + && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && (bitsize + bitpos + > GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_insv][3])))) { int xbitpos = bitpos; rtx value1; @@ -972,7 +975,10 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, #ifdef HAVE_extzv if (HAVE_extzv && (GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_extzv][0]) - >= bitsize)) + >= bitsize) + && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && (bitsize + bitpos + > GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_extzv][0])))) { int xbitpos = bitpos, xoffset = offset; rtx bitsize_rtx, bitpos_rtx; @@ -1111,7 +1117,10 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, #ifdef HAVE_extv if (HAVE_extv && (GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_extv][0]) - >= bitsize)) + >= bitsize) + && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == SUBREG) + && (bitsize + bitpos + > GET_MODE_BITSIZE (insn_operand_mode[(int) CODE_FOR_extv][0])))) { int xbitpos = bitpos, xoffset = offset; rtx bitsize_rtx, bitpos_rtx; -- 2.30.2