From 3a33dc2f914149d7e8ee1b6420793ad1e01d969e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 5 Jul 2020 13:29:29 +0100 Subject: [PATCH] add first spr compunit test (not working yet) --- .../fu/compunits/test/test_spr_compunit.py | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 src/soc/fu/compunits/test/test_spr_compunit.py diff --git a/src/soc/fu/compunits/test/test_spr_compunit.py b/src/soc/fu/compunits/test/test_spr_compunit.py new file mode 100644 index 00000000..bcc7b851 --- /dev/null +++ b/src/soc/fu/compunits/test/test_spr_compunit.py @@ -0,0 +1,59 @@ +import unittest +from soc.decoder.power_enums import (XER_bits, Function) + +from soc.fu.alu.test.test_pipe_caller import get_cu_inputs +from soc.fu.spr.test.test_pipe_caller import SPRTestCase # creates the tests + +from soc.fu.test.common import ALUHelpers +from soc.fu.compunits.compunits import SPRFunctionUnit +from soc.fu.compunits.test.test_compunit import TestRunner + + +class SPRTestRunner(TestRunner): + def __init__(self, test_data): + super().__init__(test_data, SPRFunctionUnit, self, + Function.SPR) + + def get_cu_inputs(self, dec2, sim): + """naming (res) must conform to SPRFunctionUnit input regspec + """ + res = yield from get_cu_inputs(dec2, sim) + return res + + def check_cu_outputs(self, res, dec2, sim, code): + """naming (res) must conform to SPRFunctionUnit output regspec + """ + + rc = yield dec2.e.rc.data + op = yield dec2.e.insn_type + cridx_ok = yield dec2.e.write_cr.ok + cridx = yield dec2.e.write_cr.data + + print ("check extra output", repr(code), cridx_ok, cridx) + + if rc: + self.assertEqual(cridx_ok, 1, code) + self.assertEqual(cridx, 0, code) + + sim_o = {} + + yield from ALUHelpers.get_sim_int_o(sim_o, sim, dec2) + yield from ALUHelpers.get_wr_sim_cr_a(sim_o, sim, dec2) + yield from ALUHelpers.get_sim_xer_ov(sim_o, sim, dec2) + yield from ALUHelpers.get_wr_sim_xer_ca(sim_o, sim, dec2) + yield from ALUHelpers.get_wr_fast_spr1(sim_o, sim, dec2) + + ALUHelpers.check_xer_ov(self, res, sim_o, code) + ALUHelpers.check_xer_ca(self, res, sim_o, code) + ALUHelpers.check_int_o(self, res, sim_o, code) + ALUHelpers.check_fast_spr1(self, res, sim_o, code) + ALUHelpers.check_xer_so(self, res, sim_o, code) + + +if __name__ == "__main__": + unittest.main(exit=False) + suite = unittest.TestSuite() + suite.addTest(SPRTestRunner(SPRTestCase.test_data)) + + runner = unittest.TextTestRunner() + runner.run(suite) -- 2.30.2