From 3a4d2bbc39e75feaf941a636f3de5057f3644380 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Thu, 19 Dec 2019 16:14:50 +0000 Subject: [PATCH] Use V64SI for all amdgcn add-with-carry insns 2019-12-19 Andrew Stubbs gcc/ * config/gcn/gcn-valu.md (*plus_carry_dpp_shr_): Rename to ... (*plus_carry_dpp_shr_v64si): ... this, and replace all VEC_1REG_INT_MODE with V64SI. From-SVN: r279584 --- gcc/ChangeLog | 6 ++++++ gcc/config/gcn/gcn-valu.md | 14 +++++++------- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 299f3368d08..6340deade11 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-12-19 Andrew Stubbs + + * config/gcn/gcn-valu.md (*plus_carry_dpp_shr_): Rename to ... + (*plus_carry_dpp_shr_v64si): ... this, and replace all + VEC_1REG_INT_MODE with V64SI. + 2019-12-19 David Malcolm * hash-map-tests.c (selftest::test_map_of_int_to_strings): New diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 00a7604d686..369aae5bfc5 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -3075,18 +3075,18 @@ ; Special cases for addition. -(define_insn "*plus_carry_dpp_shr_" - [(set (match_operand:VEC_1REG_INT_MODE 0 "register_operand" "=v") - (unspec:VEC_1REG_INT_MODE - [(match_operand:VEC_1REG_INT_MODE 1 "register_operand" "v") - (match_operand:VEC_1REG_INT_MODE 2 "register_operand" "v") - (match_operand:SI 3 "const_int_operand" "n")] +(define_insn "*plus_carry_dpp_shr_v64si" + [(set (match_operand:V64SI 0 "register_operand" "=v") + (unspec:V64SI + [(match_operand:V64SI 1 "register_operand" "v") + (match_operand:V64SI 2 "register_operand" "v") + (match_operand:SI 3 "const_int_operand" "n")] UNSPEC_PLUS_CARRY_DPP_SHR)) (clobber (reg:DI VCC_REG))] "" { const char *insn = TARGET_GCN3 ? "v_add%u0" : "v_add_co%u0"; - return gcn_expand_dpp_shr_insn (mode, insn, + return gcn_expand_dpp_shr_insn (V64SImode, insn, UNSPEC_PLUS_CARRY_DPP_SHR, INTVAL (operands[3])); } -- 2.30.2