From 3a5ce9503e93fd5b10ddbc4e54fbf6e2e3b46819 Mon Sep 17 00:00:00 2001
From: jamesbowman <jamesb@excamera.com>
Date: Wed, 6 Jul 2016 18:55:25 -0700
Subject: [PATCH] FT32 linker script cleanup

Fix a typo (__PMSIZE was written as __PMSIZE_) and add section alignment
for DATA and BSS.

ld/ChangeLog:

  * scripttempl/ft32.sc (__PMSIZE): Correct __PMSIZE_.
    (DATA): add ALIGN.
    (BSS): add ALIGN
---
 ld/ChangeLog           | 6 ++++++
 ld/scripttempl/ft32.sc | 4 +++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 826ea7c8325..cd6f04c63f5 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2016-07-06  James Bowman  <james.bowman@ftdichip.com>
+
+	* scripttempl/ft32.sc (__PMSIZE): Correct __PMSIZE_.
+	(DATA): add ALIGN.
+        (BSS): add ALIGN
+
 2016-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* testsuite/ld-plugin/lto.exp: Add -flto to PR ld/20321 test.
diff --git a/ld/scripttempl/ft32.sc b/ld/scripttempl/ft32.sc
index 15f8335c5cd..711965265f1 100644
--- a/ld/scripttempl/ft32.sc
+++ b/ld/scripttempl/ft32.sc
@@ -15,7 +15,7 @@ OUTPUT_ARCH(${ARCH})
 ${LIB_SEARCH_DIRS}
 
 /* Allow the command line to override the memory region sizes.  */
-__PMSIZE_ = DEFINED(__PMSIZE)  ? __PMSIZE : 256K;
+__PMSIZE = DEFINED(__PMSIZE)  ? __PMSIZE : 256K;
 __RAMSIZE = DEFINED(__RAMSIZE) ? __RAMSIZE : 64K;
 
 MEMORY
@@ -43,6 +43,7 @@ SECTIONS
     *(.rodata)
     *(.rodata*)
     ${RELOCATING+ _edata = . ; }
+    . = ALIGN(4);
   } ${RELOCATING+ > ram}
   .bss  ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
   {
@@ -50,6 +51,7 @@ SECTIONS
     *(.bss)
     *(COMMON)
     ${RELOCATING+ _end = . ;  }
+    . = ALIGN(4);
   } ${RELOCATING+ > ram}
 
   ${RELOCATING+ __data_load_start = LOADADDR(.data); }
-- 
2.30.2